; bdiGDB configuration for OMAP5912 Starter Kit
; ---------------------------------------------
;
;
[INIT]
;
WM16    0xFFFEC808  0x00F5      ;Disable Watchdog Timer
WM16    0xFFFEC808  0x00A0      ;
;
;WGPR    11          0x10000020  ;set frame pointer to free RAM
;WM32    0x10000020  0x10000028	;dummy stack frame
;
MMAP    0x00000000  0x01FFFFFF  ;enable access to CS0
MMAP    0x04000000  0x05FFFFFF  ;enable access to CS1
MMAP    0x08000000  0x09FFFFFF  ;enable access to CS2
MMAP    0x0C000000  0x0DFFFFFF  ;enable access to CS3
MMAP    0x10000000  0x1FFFFFFF  ;enable access to SDRAM
MMAP    0xFFFB0000  0xFFFEFFFF  ;enable access to peripheral
;

[TARGET]
CPUTYPE     ARM926E
;CLOCK       0 4                 ;JTAG clock : start with 1 MHz then use adaptive
CLOCK       4                   ;JTAG clock : without adaptive clocking cable
SCANPRED    1 8                 ;JTAG devices connected before this core
SCANSUCC    1 38                ;JTAG devices connected after this core
TRST        PUSHPULL            ;TRST driver type (OPENDRAIN | PUSHPULL)
RESET	    HARD                ;NONE | HARD <n> (ms)
ENDIAN      LITTLE              ;memory model (LITTLE | BIG)
VECTOR      CATCH 0x1f          ;catch D_Abort, P_Abort, SWI, Undef and Reset
BREAKMODE   SOFT	        ;SOFT or HARD, ARM / Thumb break code
WAKEUP      50

;SCANINIT    r1:t1:w1000:t0:w1000:  ;assert reset and toggle TRST
;SCANINIT    r0:w30000              ;release reset and wait


[HOST]
IP          151.120.25.119
FILE        E:\temp\dump512k.bin
FORMAT      BIN  0x10000000
LOAD        MANUAL      ;load code MANUAL or AUTO after reset
PROMPT      5912>

[FLASH]
WORKSPACE   0x10000000	;workspace in target RAM
CHIPTYPE    STRATAX16
CHIPSIZE    0x01000000
BUSWIDTH    16
FILE        E:\cygwin\home\bdidemo\arm\omap5912.cfg
FORMAT      BIN  0x00040000
ERASE       0x00040000

[REGS]
FILE	E:\cygwin\home\bdidemo\arm\regOMAP5912.def