; bdiGDB configuration for ARM926E
; --------------------------------
;
;
[INIT]
;
;

[TARGET]
CPUTYPE     ARM926E
CLOCK       3                   ;JTAG clock : without adaptive clocking cable
TRST        OPENDRAIN           ;TRST driver type (OPENDRAIN | PUSHPULL)
RESET	    HARD	        ;NONE | HARD <n> (ms)
STARTUP     STOP 3000           ;let the monitor setup the memory controller.
ENDIAN      LITTLE              ;memory model (LITTLE | BIG)
VECTOR      CATCH 0x1f          ;catch D_Abort, P_Abort, SWI, Undef and Reset
BREAKMODE   SOFT	        ;SOFT or HARD, ARM / Thumb break code
WAKEUP      500


[HOST]
IP          151.120.25.119
FILE        E:\temp\dump512k.bin
FORMAT      BIN  0x10000000
LOAD        MANUAL              ;load code MANUAL or AUTO after reset
PROMPT      926E>


[FLASH]

[REGS]
FILE	$reg926e.def