; bdiGDB configuration for TI OMAP4 Board
; ---------------------------------------
;
; The TI debug connector on the board does not match the
; 14-pin Embedded ICE connector. So the cable delivered
; with the BDI needs to be modified.
;
; To halt the core as soon as possible after power-up,
; select EMU1=1,EMU0=0 (Wait In Reset mode WIR).
;
; Commands supported in the SCANINIT and SCANPOST strings:
;
;  I<n>=<...b2b1b0>   write IR, b0 is first scanned
;  D<n>=<...b2b1b0>   write DR, b0 is first scanned
;                       n  : the number of bits 1..256
;                       bx : a data byte, two hex digits
;  W<n>               wait for n (decimal) micro seconds
;  T1                 assert TRST
;  T0                 release TRST
;  R1                 assert RESET
;  R0                 release RESET
;  CH<n>              clock TCK n (decimal) times with TMS high
;  CL<n>              clock TCK n (decimal) times with TMS low
;
;
[INIT]


[TARGET]
; common parameters
CLOCK           1                       ;JTAG clock
POWERUP         2000                    ;power-up delay
TRST            PUSHPULL                ;TRST driver type (OPENDRAIN | PUSHPULL)
WAKEUP          100                     ;delay after reset released
RESET	        HARD	                ;NONE | HARD <n> (ms)

; Configure ICEPick module to make DAP-TAP visible
SCANINIT    t1:w1000:t0:w1000:          ;toggle TRST,
SCANINIT    ch10:w1000:                 ;clock TCK with TMS high and wait
SCANINIT    i6=07:d8=89:i6=02:          ;connect and select router
SCANINIT    d32=81000080:               ;IP control: KeepPowered
SCANINIT    d32=a9002008:               ;TAP9: DebugConnect, ForceActive
SCANINIT    d32=e0002008:               ;non_JTAG debug core#0: DebugConnect, ForceActive
SCANINIT    d32=81000081:               ;IP control: KeepPowered, SysReset
SCANINIT    d32=a9002108:               ;enable TAP9
SCANINIT    cl10:i10=ffff               ;clock 10 times in RTI, scan bypass

; CoreID#0 parameters (active core after reset)
#0 CPUTYPE      CORTEX-A9 0xD4140000    ;force APB Debug Base address
#0 DAPPC        0xD4159008              ;Cortex-A9#0 DAP-PC address
#0 STARTUP      HALT
#0 ENDIAN       LITTLE                  ;memory model (LITTLE | BIG)
#0 MEMACCESS    CORE  1                 ;memory access via core (8 TCK's access delay)
#0 STEPMODE     OVER                    ;OVER or INTO
#0 BREAKMODE    HARD                    ;SOFT or HARD
#0 DCC          7                       ;DCC I/O via TCP port 7
#0 SCANPRED     1 6                     ;count for ICEPick TAP
#0 SCANSUCC     0 0                     ;no device after DAP

; CoreID#1 parameters
#1 CPUTYPE      CORTEX-A9 0xD4142000    ;force APB Debug Base address
#1 DAPPC        0xD415900C              ;Cortex-A9#1 DAP-PC address
#1 STARTUP      RUN
#1 ENDIAN       LITTLE                  ;memory model (LITTLE | BIG)
#1 MEMACCESS    CORE  1                 ;memory access via core (8 TCK's access delay)
#1 STEPMODE     OVER                    ;OVER or INTO
#1 BREAKMODE    HARD                    ;SOFT or HARD
#1 SCANPRED     1 6                     ;count for ICEPick TAP
#1 SCANSUCC     0 0                     ;no device after DAP



[HOST]
IP          151.120.25.119

#0 PROMPT      OMAP4#0>
#1 PROMPT      OMAP4#1>


[FLASH]


[REGS]
FILE	$regOMAP4.def