; bdiGDB configuration for TI OMAP3430 ES2.0
; ------------------------------------------
;
; Commands supported in the SCANINIT and SCANPOST strings:
;
;  I<n>=<...b2b1b0>   write IR, b0 is first scanned
;  D<n>=<...b2b1b0>   write DR, b0 is first scanned
;                       n  : the number of bits 1..256
;                       bx : a data byte, two hex digits
;  W<n>               wait for n (decimal) micro seconds
;  T1                 assert TRST
;  T0                 release TRST
;  R1                 assert RESET
;  R0                 release RESET
;  CH<n>              clock TCK n (decimal) times with TMS high
;  CL<n>              clock TCK n (decimal) times with TMS low
;
;
[INIT]
;
WREG    CPSR        0x000001D3  ;select ARM / supervisor mode
WM32    0x48314048  0x0000aaaa  ;disable watchdog WDT2
WM32    0x48314048  0x00005555  ;disable watchdog WDT2
;
; put endless loop into SRAM
WM32    0x40200000  0xE320F000  ; NOP
WM32    0x40200004  0xE320F000  ; NOP
WM32    0x40200008  0xE320F000  ; NOP
WM32    0x4020000c  0xE320F000  ; NOP
WM32    0x40200010  0xE320F000  ; NOP
WM32    0x40200014  0xE320F000  ; NOP
WM32    0x40200018  0xE320F000  ; NOP
WM32    0x4020001c  0xEAFFFFFC  ; B -4
WGPR    15          0x40200000  ; set PC
;
; clear scratch pad so reset starts working
WM32    0x48002900  0
WM32    0x48002904  0
WM32    0x48002908  0
WM32    0x4800290c  0
WM32    0x48002910  0
WM32    0x48002914  0
WM32    0x48002918  0
WM32    0x4800291c  0
WM32    0x48002920  0
WM32    0x48002924  0
WM32    0x48002928  0
WM32    0x4800292c  0
WM32    0x48002930  0
WM32    0x48002934  0
WM32    0x48002938  0
WM32    0x4800293c  0
WM32    0x48002940  0
WM32    0x48002944  0
WM32    0x48002948  0
WM32    0x4800294c  0
WM32    0x48002950  0
WM32    0x48002954  0
WM32    0x48002958  0
WM32    0x4800295c  0
WM32    0x48002960  0
WM32    0x48002964  0
WM32    0x48002968  0
WM32    0x4800296c  0
WM32    0x48002970  0
WM32    0x48002974  0
WM32    0x48002978  0
WM32    0x4800297c  0
WM32    0x48002980  0
WM32    0x48002984  0
WM32    0x48002988  0
WM32    0x4800298c  0
WM32    0x48002990  0
WM32    0x48002994  0
WM32    0x48002998  0
WM32    0x4800299c  0
WM32    0x480029a0  0
WM32    0x480029a4  0
WM32    0x480029a8  0
WM32    0x480029ac  0
WM32    0x480029b0  0
WM32    0x480029b4  0
WM32    0x480029b8  0
WM32    0x480029bc  0
WM32    0x480029c0  0
WM32    0x480029c4  0
WM32    0x480029c8  0
WM32    0x480029cc  0
WM32    0x480029d0  0
WM32    0x480029d4  0
WM32    0x480029d8  0
WM32    0x480029dc  0
WM32    0x480029e0  0
WM32    0x480029e4  0
WM32    0x480029e8  0
WM32    0x480029ec  0
WM32    0x480029f0  0
WM32    0x480029f4  0
WM32    0x480029f8  0
WM32    0x480029fc  0
;



[TARGET]
CPUTYPE     OMAP3430
CLOCK       1                   ;JTAG clock
POWERUP     500                 ;power-up delay
TRST        PUSHPULL            ;TRST driver type (OPENDRAIN | PUSHPULL)
RESET	    KEEP	        ;keep RESET asserted during target power-up
STARTUP     HALT
;STARTUP     STOP  5000          ;let boot code setup the system
ENDIAN      LITTLE              ;memory model (LITTLE | BIG)
;WAKEUP      100
MEMACCESS   CORE  1             ;memory access via core (8 TCK's access delay)
;MEMACCESS   AHB   1             ;memory access via AHB  (8 TCK's access delay)

SCANPRED    1 6                 ;count for ICEPick TAP
SCANSUCC    0 0                 ;no device after Cortex-A8

; Configure ICEPick module to make Cortex-A8 DAP-TAP visible
SCANINIT    r1:w100:r0:w100:
SCANINIT    t1:w100:t0:w100:    ;toggle TRST,
SCANINIT    ch10:w100:          ;clock TCK with TMS high and wait
SCANINIT    i6=07:d8=89:i6=02:  ;connect and select router
SCANINIT    d32=81000080:       ;IP control: KeepPowered
SCANINIT    d32=a3002048:       ;TAP3: DebugConnect, ForcePower, ForceActive
SCANINIT    d32=a3002148:       ;enable TAP3
SCANINIT    cl10:i10=ffff       ;clock 10 times in RTI, scan bypass
;


[HOST]
IP          151.120.25.119
FILE        E:/temp/dump1024k.bin
FORMAT      BIN 0x80000000
LOAD        MANUAL      ;load file MANUAL or AUTO after reset
PROMPT      OMAP3430_ES2>

[FLASH]

[REGS]
FILE	$regOMAP3430.def