; bdiGDB configuration for ARM Integrator CM1136JF-S
; --------------------------------------------------
;
[INIT]
WCP15   0x4001      0x00f00000  ;CPACC: allow CP10 and CP11 access
WCP10   0x00e8      0x40000000  ;FPEXC: enable VFP11 coprocessor
;
WM32    0x1000000c  0x00000005  ;REMAP=1, MISC LED ON
;
;Setup MMU and enable cache, Translation table at 0x00004000
;
WCP15   0x0002      0x00004000  ;set Translation Base Address
WCP15   0x0003      0xFFFFFFFF  ;set Domain Access Control
WM32    0x00004000  0x00000C0E  ;MMU: 0x00000000, cacheable, bufferable
WM32    0x00004004  0x00100C0E  ;MMU: 0x00100000, cacheable, bufferable
WM32    0x00004008  0x00200C0E  ;MMU: 0x00200000, cacheable, bufferable
WM32    0x0000400C  0x00300C0E  ;MMU: 0x00300000, cacheable, bufferable
WM32    0x00004010  0x00400C0E  ;MMU: 0x00400000, cacheable, bufferable
WM32    0x00004014  0x00500C0E  ;MMU: 0x00500000, cacheable, bufferable
WM32    0x00004018  0x00600C0E  ;MMU: 0x00600000, cacheable, bufferable
WM32    0x0000401C  0x00700C0E  ;MMU: 0x00700000, cacheable, bufferable
WM32    0x00004020  0x00800C0E  ;MMU: 0x00800000, cacheable, bufferable
WM32    0x00004024  0x00900C0E  ;MMU: 0x00900000, cacheable, bufferable
WM32    0x00004028  0x00A00C0E  ;MMU: 0x00A00000, cacheable, bufferable
WM32    0x0000402C  0x00B00C0E  ;MMU: 0x00B00000, cacheable, bufferable
WM32    0x00004030  0x00C00C0E  ;MMU: 0x00C00000, cacheable, bufferable
WM32    0x00004034  0x00D00C0E  ;MMU: 0x00D00000, cacheable, bufferable
WM32    0x00004038  0x00E00C0E  ;MMU: 0x00E00000, cacheable, bufferable
WM32    0x0000403C  0x00F00C0E  ;MMU: 0x00F00000, cacheable, bufferable
;
WCP15   0x0001     0x0005107D  ;enable MMU, Caches and Write Buffer
;


[TARGET]
CPUTYPE     ARM1136
;CLOCK       0 SLOW              ;JTAG clock (0=Adaptive,1=16MHz,2=8MHz,3=4MHz)
CLOCK       1                   ;JTAG clock (0=Adaptive,1=16MHz,2=8MHz,3=4MHz)
POWERUP     3000                ;start delay after power-up detected in ms
ENDIAN      LITTLE              ;memory model (LITTLE | BIG)
VECTOR      CATCH 0x1f          ;catch D_Abort, P_Abort, SWI, Undef and Reset
BREAKMODE   SOFT                ;SOFT or HARD
;DCC         7                   ;DCC I/O via TCP port 7
;
SCANPRED    0 0                 ;no JTAG devices before the ARM1136
SCANSUCC    1 4                 ;the ETMBUF after the ARM1136 core


[HOST]
IP          151.120.25.119
FILE        E:\cygwin\home\demo\arm11\fibo.x
FORMAT      ELF
LOAD        MANUAL      ;load file MANUAL or AUTO after reset
PROMPT      ARM1136>

[FLASH]
WORKSPACE   0x00001000  ;workspace in target RAM for fast programming algorithm
CHIPTYPE    AM29BX8     ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16)
CHIPSIZE    0x100000    ;The size of one flash chip in bytes
BUSWIDTH    32          ;The width of the flash memory bus in bits (8 | 16 | 32)
FILE        $arm1136.cfg
FORMAT      BIN 0x00010000

[REGS]
FILE	$reg1136.def