; ----------------------------------------------------
; bdiGDB configuration for Freescale M9328MX31ADS board
; ----------------------------------------------------
;

[INIT]

WCP15  0x0001 0x00050078		; CP15 control register
WCP15  0x0707 0x00000000		; CP15 invalidate I&D
WCP15  0x0708 0x00000000		; CP15 invalidate TLB
WCP15  0x4A07 0x00000000		; CP15 clean write buf. 
WCP15  0x420F 0x40000015		; CP15 for enabling the pripheral bus

WM32  0x53FC0000 0x040			; setup ipu
WM32  0x53F80000 0x074B0B7D		; init_ccm

;WM32  0x53F80004 0xFF871D58		; 532-133-66.5
;WM32  0x53F80010 0x0033280C

wM32  0x53F80004 0xFF871D50		; 399-133-66.5
WM32  0x53F80010 0x00271C1B		;

;WM32  0x53F80004 0xFF871D48		; 208-104-52
;WM32  0x53F80010 0x04002000

;WM32  0xb8002050 0x0000dcf6		; Configure PSRAM on CS5
;WM32  0xb8002054 0x444a4541
;WM32  0xb8002058 0x44443302
;WM32  0xB6000000 0xCAFECAFE 

WM32  0xb8002000 0x0000CC03		; Start 16 bit NorFlash Initialization on CS0
WM32  0xb8002004 0xa0330D01
WM32  0xb8002008 0x00220800
WM32  0xb8002040 0x0000DCF6		; Configure CPLD on CS4 
WM32  0xb8002044 0x444A4541
WM32  0xb8002048 0x44443302
					; Disable maximum drive strength for SDRAM/DDR lines by clearing DSE1 bits
					; in SW_PAD_CTL registers
WM32  0x43FAC26C 0			; SDCLK
WM32  0x43FAC270 0			; CAS
WM32  0x43FAC274 0			; RAS
WM32  0x43FAC27C 0x1000			; CS2 (CSD0)
WM32  0x43FAC284 0			; DQM3
WM32  0x43FAC288 0			; DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2DC)
WM32  0x43FAC28C 0
WM32  0x43FAC290 0
WM32  0x43FAC294 0
WM32  0x43FAC298 0
WM32  0x43FAC29C 0
WM32  0x43FAC2A0 0
WM32  0x43FAC2A4 0
WM32  0x43FAC2A8 0
WM32  0x43FAC2AC 0
WM32  0x43FAC2B0 0
WM32  0x43FAC2B4 0
WM32  0x43FAC2B8 0
WM32  0x43FAC2BC 0
WM32  0x43FAC2C0 0
WM32  0x43FAC2C4 0
WM32  0x43FAC2C8 0
WM32  0x43FAC2CC 0
WM32  0x43FAC2D0 0
WM32  0x43FAC2D4 0
WM32  0x43FAC2D8 0
WM32  0x43FAC2DC 0
WM32  0xB8001010 0x00000004		; Initialization script for 32 bit DDR on Tortola EVB 
WM32  0xB8001004 0x006ac73a
WM32  0xB8001000 0x92100000
WM32  0x80000f00 0x12344321
WM32  0xB8001000 0xa2100000
WM32  0x80000000 0x12344321
WM32  0x80000000 0x12344321
WM32  0xB8001000 0xb2100000
WM8   0x80000033 0xda
WM8   0x81000000 0xff
WM32  0xB8001000 0x82226080
WM32  0x80000000 0xDEADBEEF
WM32  0xB8001010 0x0000000c
WGPR  15         0x83F00000		; boot secret


[TARGET]
CPUTYPE		ARM1136
;CLOCK		10		; work fine for bring-up JTAG clock (0=Adaptive,1=16MHz,2=8MHz,3=4MHz, 10=10KHz) 
CLOCK		1		; high speed with Freescale MX31 ADS
WAKEUP		200		; because of medium rising reset line
RESET		HARD 100	; beause of light capacitive load on reset line
ENDIAN		LITTLE		; memory model (LITTLE | BIG)
BREAKMODE	HARD		; HARD, ARM / Thumb break code
;VECTOR      CATCH 0x1f		;catch D_Abort, P_Abort, SWI, Undef and Reset
;VECTOR      CATCH 0x00		;do not catch any vector
SCANPRED	2 9		;
SCANSUCC	1 4		; the ETMBUF after the ARM1136 core
STARTUP 	RESET		; the ARM 11 core is stop after reset


[HOST]
IP		10.161.204.214
PROMPT		Freescale-Mx31>
FILE		/tftpboot/bdi/appramMX31ADS.elf
FORMAT		ELF
LOAD		MANUAL		; load code MANUAL or AUTO after reset


[FLASH]
;WORKSPACE      0xc0000000
CHIPSIZE        0x1000000
CHIPTYPE        AM29BX16
BUSWIDTH        32
;ERASE       0xA0000000 CHIP
ERASE       0xA0000000 SECTOR
ERASE       0xA0002000 SECTOR
ERASE       0xA0004000 SECTOR
ERASE       0xA0006000 SECTOR
ERASE       0xA0008000 SECTOR
ERASE       0xA000A000 SECTOR
ERASE       0xA000C000 SECTOR
ERASE       0xA000E000 SECTOR
ERASE       0xA0010000 SECTOR
ERASE       0xA0012000 SECTOR
ERASE       0xA0014000 SECTOR
ERASE       0xA0016000 SECTOR
ERASE       0xA0018000 SECTOR
ERASE       0xA001A000 SECTOR
ERASE       0xA001C000 SECTOR
ERASE       0xA001E000 SECTOR
FILE        /tftpboot/bdi/appromMX31ADS.elf
FORMAT      ELF


[REGS]
FILE    /tftpboot/bdi/reg1136.def