; ======================================
; bdiGDB configuration for EFM32-G8xx-DK
; ======================================
;
; Info about the JTAG clock frequency:
; ------------------------------------
; BDI2000:
;   0=Adaptive,
;   1=16MHz, 2=8MHz, 3=4MHz,
;   4= 1MHz, 5=500kHz, 6=200kHz, 7=100kHz, 8=50kHz,
;   9=20kHz, 10=10kHz, 11=5kHz, 12=2kHz, 13=1kHz
; BDI3000:
;   0=Adaptive,
;   1=32MHz, 2=16MHz, 3=11MHz, 4=8MHz, 5=5MHz, 6=4MHz,
;   7=1MHz, 8=500kHz, 9=200kHz, 10=100kHz, 11=50kHz,
;   12=20kHz, 13=10kHz, 14=5kHz, 15=2kHz, 16=1kHz,
;


[INIT]
;WGPR    13      0x20003ffc      ;set SP to top of internal SRAM
;

[TARGET]
POWERUP     5000
CPUTYPE	    CORTEX-M3
CLOCK       2 7                 ;BDI3000: start with 1 MHz then use 16MHz
;CLOCK       1  4                ;BDI2000: start with 1 MHz then use 16MHz
POWERUP     1000                ;start delay after power-up detected in ms
;RESET	    HARD 100            ;assert reset for 100 ms
RESET	    SOFT 100            ;assert reset via Reset Control Register, toggle hard reset
WAKEUP	    100                 ;wait after reset released
STARTUP     HALT                ;halt immediatelly at the reset vector
;STARTUP     RUN                 ;let boot ROM setup the system
ENDIAN      LITTLE              ;memory model (LITTLE | BIG)
BREAKMODE   HARD                ;SOFT or HARD
MEMACCESS   AHB   2             ;memory access via AHB  (16 TCK's access delay)
;


[HOST]
IP          151.120.25.112
PROMPT	    EFM32>
FILE        E:/temp/dump16k.bin
FORMAT      BIN 0x20000000


[FLASH]
CHIPTYPE    EFM32
CHIPSIZE    0x20000
FILE        E:/temp/dump16k.bin
FORMAT      BIN 0x00010000
ERASE       0x00010000 512 32


[REGS]
FILE    $regEFM32.def