;bdiGDB configuration file for P5020-DS
;--------------------------------------
;
;
[INIT]
;
; Release core(s) for booting
WM32    0xfe0e00e4      0x00000001      ;BRR:


[TARGET]
; common parameters
POWERUP     5000                ;start delay after power-up detected in ms
JTAGCLOCK   2                   ;use 4 MHz JTAG clock
RESET       HARD  1000          ;assert reset for 1 seconds
WAKEUP      200                 ;give reset time to complete
;
; Core#0 parameters (active core after reset)
#0 CPUTYPE      P5020 0 0       ;Core0 / SOC0
#0 STARTUP      HALT            ;halt at the reset vector (this halts all cores !!!)
;#0 STARTUP      STOP  5000      ;let U-boot setup the system
#0 BREAKMODE    HARD            ;SOFT or HARD, HARD uses PPC hardware breakpoint
#0 STEPMODE     HWBP            ;ICMP or HWBP, HWBP uses a hardware breakpoint
;
; RCW Source Override
#0 RCWSRC       0x18            ;Hard-Coded RCW 1_1000
#0 RCWOVR  6    0xfec00000      ;192: all cores holdoff

;
; Core#1 parameters
;#1 CPUTYPE      P5020 1 0       ;Core1 / SOC0
;#1 STARTUP      RUN             ;let core run
;


[HOST]
#0 PROMPT       P5020#0>
#1 PROMPT       P5020#1>
;

[FLASH]


[REGS]
FILE        $regP5020.def
;