;bdiGDB configuration file for P4080-DS
;--------------------------------------
;
;
[INIT]
;
; setup device trigger, debug halt always all cores
; only writes to DCSR are processed for a running core
WREG    cgcr0           0x000000ff      ;CGCR0: Core Group 0 (0,1,2,3,4,5,6,7)
WREG    cgcr1           0x000000ff      ;CGCR1: Core Group 1 (0,1,2,3,4,5,6,7)
WREG    cgcr2           0x000000ff      ;CGCR2: Core Group 2 (0,1,2,3,4,5,6,7)
WREG    csttacr0        0x00020001      ;CSTTACR0: trigger if a core from group 1 enter debug halt
WREG    cgacrd4         0x00000022      ;CGACRD4 : if device event, halt cores in group 2
;


[TARGET]
; common parameters
POWERUP     5000                ;start delay after power-up detected in ms
JTAGCLOCK   8000000             ;use 8 MHz JTAG clock
WAKEUP      200                 ;give reset time to complete
;
;========================================================
; !!!! define the core ID (the #x) without any holes !!!!
; !!!! no need that core ID matches the core number  !!!!
; !!!! A valid example is: #1 CPUTYPE  P4080 5 0     !!!!
;========================================================
;
; Core#0 parameters (active core after reset)
#0 CPUTYPE      P4080 0 0       ;Core0 / SOC0
#0 EDBCR0       EDM DNH EFT     ;set run parameters
#0 STARTUP      RUN            ;let core run
#0 BREAKMODE    HARD
#0 STEPMODE     HWBP
#0 MEMACCESS    CORE
#0 CGROUP       0xff            ;GDB continue core group (resume)
;
; Core#1 parameters
#1 CPUTYPE      P4080 1 0       ;Core1 / SOC0
#1 EDBCR0       EDM DNH EFT     ;set run parameters
#1 STARTUP      RUN             ;let core run
#1 MEMACCESS    CORE
#1 CGROUP       0x02            ;GDB continue core group (prepare)
;
; Core#2 parameters
#2 CPUTYPE      P4080 2 0       ;Core2 / SOC0
#2 EDBCR0       EDM DNH EFT     ;set run parameters
#2 STARTUP      RUN             ;let core run
#2 MEMACCESS    CORE
#2 CGROUP       0x04            ;GDB continue core group (prepare)
;
; Core#3 parameters
#3 CPUTYPE      P4080 3 0       ;Core3 / SOC0
#3 EDBCR0       EDM DNH EFT     ;set run parameters
#3 STARTUP      RUN             ;let core run
#3 MEMACCESS    CORE
#3 CGROUP       0x08            ;GDB continue core group (prepare)
;
; Core#4 parameters
#4 CPUTYPE      P4080 4 0       ;Core4 / SOC0
#4 EDBCR0       EDM DNH EFT     ;set run parameters
#4 STARTUP      RUN             ;let core run
#4 MEMACCESS    CORE
#4 CGROUP       0x10            ;GDB continue core group (prepare)
;
; Core#5 parameters
#5 CPUTYPE      P4080 5 0       ;Core5 / SOC0
#5 EDBCR0       EDM DNH EFT     ;set run parameters
#5 STARTUP      RUN             ;let core run
#5 MEMACCESS    CORE
#5 CGROUP       0x20            ;GDB continue core group (prepare)
;
; Core#6 parameters
#6 CPUTYPE      P4080 6 0       ;Core6 / SOC0
#6 EDBCR0       EDM DNH EFT     ;set run parameters
#6 STARTUP      RUN             ;let core run
#6 MEMACCESS    CORE
#6 CGROUP       0x40            ;GDB continue core group (prepare)
;
; Core#7 parameters
#7 CPUTYPE      P4080 7 0       ;Core7 / SOC0
#7 EDBCR0       EDM DNH EFT     ;set run parameters
#7 STARTUP      RUN             ;let core run
#7 MEMACCESS    CORE
#7 CGROUP       0x80            ;GDB continue core group (prepare)
;


[HOST]
#0 PROMPT       P4080#0>
#1 PROMPT       P4080#1>
#2 PROMPT       P4080#2>
#3 PROMPT       P4080#3>
#4 PROMPT       P4080#4>
#5 PROMPT       P4080#5>
#6 PROMPT       P4080#6>
#7 PROMPT       P4080#7>
;

[FLASH]


[REGS]
FILE        $regP4080.def