; bdiGDB configuration file for IDT79S334A board ; ---------------------------------------------- ; [INIT] ; Setup Internal Bus ;WM32 0xFFFFE200 0xAA822AAA ;CPU Port Width Register, Flash 8bit WM32 0xFFFFE200 0xAA82AAAA ;CPU Port Width Register, Flash 32bit WM32 0xFFFFE204 0x3FFFFFFF ;CPU BTA Register WM32 0xB8000000 0x3FFFFFFF ;BTA Register WM32 0xB8000004 0x00000007 ;Address Latch Timing Register ; WCP0 12 0x10010000 ;Setup Status Register, clear BEV WCP0 13 0x00000000 ;Clear Cause Register WCP0 16 0x00000003 ;Set kseg0 coherency WM32 0xB8000730 0x00000000 ;Disable Watchdog Timer ; ; Init memory controller WM32 0xB8000080 0x1FC00000 ;Memory Base Address Bank 0, Flash WM32 0xB8000084 0xFFC00000 ;Memory Base Mask Bank 0, Flash WM32 0xB8000088 0x04000000 ;Memory Base Address Bank 1, SRAM WM32 0xB800008C 0xFFF00000 ;Memory Base Mask Bank 1, SRAM ;WM32 0xB8000200 0x00002084 ;Memory Control Bank 0, Flash 8bit WM32 0xB8000200 0x00002884 ;Memory Control Bank 0, Flash 32bit WM32 0xB8000204 0x00002863 ;Memory Control Bank 1, SRAM WM32 0xB8000208 0x000060E7 ;Memory Control Bank 2, INT_status WM32 0xB800020C 0x000060E7 ;Memory Control Bank 3, NV_RAM WM32 0xB8000210 0x000060E7 ;Memory Control Bank 4, LED_Display WM32 0xB8000214 0x000060E7 ;Memory Control Bank 5, SCC (85C30) ; ; Init SDRAM controller WM32 0xB8000310 0x00000000 ;Clear reserved (from IDT/SIM) ??? WM32 0xB80000C0 0x00000000 ;SDRAM base address WM32 0xB80000C8 0x01000000 WM32 0xB80000D0 0x02000000 WM32 0xB80000D8 0x03000000 WM32 0xB80000C4 0xff000000 ;SDRAM base mask WM32 0xB80000CC 0xff000000 WM32 0xB80000D4 0xff000000 WM32 0xB80000DC 0xff000000 WM32 0xB8000760 0x00000000 ;Disable DRAM Refresh Timer WM32 0xB8000300 0x896580FF ;SDRAM Control (value from IDT/SIM) DELAY 100 ; WM32 0xB8000300 0x896580A0 ;Configure SDRAM (sequence from IDT/SIM) WM32 0xA0000000 0xA5A5A5A5 WM32 0xB8000300 0x896580A0 WM32 0xA0000000 0xA5A5A5A5 ; WM32 0xB8000300 0x89658090 WM32 0xA0000000 0xA5A5A5A5 WM32 0xB8000300 0x89658090 WM32 0xA0000000 0xA5A5A5A5 WM32 0xB8000300 0x89658090 WM32 0xA0000000 0xA5A5A5A5 WM32 0xB8000300 0x89658090 WM32 0xA0000000 0xA5A5A5A5 WM32 0xB8000300 0x89658090 WM32 0xA0000000 0xA5A5A5A5 WM32 0xB8000300 0x89658090 WM32 0xA0000000 0xA5A5A5A5 WM32 0xB8000300 0x89658090 WM32 0xA0000000 0xA5A5A5A5 WM32 0xB8000300 0x89658090 WM32 0xA0000000 0xA5A5A5A5 ; WM32 0xB8000300 0x89658080 WM32 0xA0000080 0xA5A5A5A5 WM32 0xB8000300 0x896580FF ; WM32 0xB8000764 0x00000000 ;Clear DRAM Refresh Counter WM32 0xB8000768 0x00000040 ;Set DRAM Refresh Compare WM32 0xB8000748 0x000000FF ;Set Bus Timeout WM32 0xB8000758 0x000000FF ;Set IP Bus Timeout WM32 0xB8000760 0x00000001 ;Enable DRAM Refresh Timer DELAY 100 WM32 0xB8000768 0x00000460 ;Set final DRAM Refresh Compare ; ; Setup TLB ;WTLB 0x00000500 0x01FC0017 ;Boot ROM 2 x 1MB, uncached DVG ; ; Invalidate Caches IVIC 2 256 ;Invalidate IC, 2 way, 256 sets IVDC 2 64 ;Invalidate DC, 2 way, 64 sets ; ; Initialize UART0 WM32 0xB8000804 0 ;Disable UART interrupts WM32 0xB800080C 0x80 ;Set Divisor Latch Access bit WM32 0xB8000800 0xAE ;Set baud rate divisor to 0x1AE WM32 0xB8000804 1 ;9600bps @ 66MHz WM32 0xB800080C 0x3 ;8n1 - Reset Divisor Latch Access bit WM32 0xB8000808 0xC7 ;FIFO WM32 0xB8000600 0x1F9 ;Set PIO for UART WM32 0xB8000604 0xE5F WM32 0xB8000608 0xF0 ; ; Disable Bus Error (for PCI scan) WM32 0xB8000010 0xD8 [TARGET] JTAGCLOCK 1 ;use 8 MHz JTAG clock CPUTYPE RC32300 ;the used target CPU type WAKEUP 500 ;give reset time to complete ENDIAN LITTLE ;target is big endian WORKSPACE 0xA0000080 ;workspace in target RAM for fast download / upload BDIMODE AGENT ;the BDI working mode (LOADONLY | AGENT) BREAKMODE SOFT ;SOFT or HARD, HARD uses PPC hardware breakpoints VECTOR CATCH ;catch unhandled exceptions [HOST] IP 151.120.25.119 ;FILE E:\cygwin\home\bdidemo\mips\fibo.x ;FORMAT ELF FILE E:\cygwin\home\bdidemo\mips\vmlinus FORMAT ELF LOAD MANUAL ;load code MANUAL or AUTO after reset [FLASH] WORKSPACE 0xa0000000 ;workspace in target RAM for fast programming algorithm CHIPTYPE AM29F ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16) CHIPSIZE 0x80000 ;The size of one flash chip in bytes (e.g. AM29F040 = 0x80000) BUSWIDTH 32 ;The width of the flash memory bus in bits (8 | 16 | 32) ;FILE E:\cygwin\home\bdidemo\mips\loop_le.sss FILE E:\cygwin\home\bdidemo\mips\s334_le.sss FORMAT SREC ;FILE E:\cygwin\home\bdidemo\mips\fibo.x ;FORMAT BIN 0xBFC40000 ;ERASE 0xBFC00000 ;erase sector 0 ;ERASE 0xBFC10000 ;erase sector 1 ;ERASE 0xBFC20000 ;erase sector 2 ;ERASE 0xBFC30000 ;erase sector 3 ;ERASE 0xBFC40000 ;erase sector 4 ;ERASE 0xBFC50000 ;erase sector 5 ;ERASE 0xBFC60000 ;erase sector 6 ;ERASE 0xBFC70000 ;erase sector 7 ERASE 0xBFC00000 ;erase sector 0 ERASE 0xBFC40000 ;erase sector 1 ERASE 0xBFC80000 ;erase sector 2 [REGS] DMM1 0xFF300000 ;DSU base address DMM2 0xB8000000 ;Memory mapped registers FILE E:\cygwin\home\bdidemo\mips\reg32334.def