; bdiGDB configuration file for IDT 438 board ; ---------------------------------------------- ; [INIT] WCP0 12 0x10010000 ;Setup Status Register WCP0 13 0x00000000 ;Clear Cause Register WCP0 16 0x00000003 ;Set kseg0 coherency WM32 0xB803003C 0x00000000 ;Disable Watchdog Timer ; ; Init memory controller ; WM32 0xB8010000 0x1FC00000 ;Memory Base Address Bank 0 WM32 0xB8010004 0xFFC00000 ;Memory Base Mask Bank 0 WM32 0xB8010008 0x0FFFFFF4 ;Memory Base Control Bank 0 WM32 0xB801000C 0x00001FFF ;Memory Base Timing Bank 0 WM32 0xB8010010 0x19000000 ;Memory Base Address Bank 1 WM32 0xB8010014 0xF8000000 ;Memory Base Mask Bank 1 WM32 0xB8010018 0x0FFFFFF4 ;Memory Base Control Bank 1 WM32 0xB801001C 0x00001FFF ;Memory Base Timing Bank 1 ; ; Init SDRAM controller ; WM32 0xB8018000 0x00000000 ;DDR 0 base address WM32 0xB8018004 0xFC000000 ;DDR 0 mask WM32 0xB801800C 0x00000000 ;DDR 1 mask WM32 0xB8018018 0x00000000 ;DDR Alternate mask WM32 0xB8018010 0x02984840 ;DDR reset DELAY 1 WM32 0xB8018020 0x0000003F ;NOP WM32 0xA0000000 0xAA55AA55 WM32 0xB8018020 0x00000033 ;Precharge WM32 0xA0001000 0xAA55AA55 WM32 0xB8018020 0x00000063 ;DDR EMode WM32 0xA0000000 0xAA55AA55 WM32 0xB8018020 0x00000023 ;DDR Mode WM32 0xA0000584 0xAA55AA55 DELAY 1 WM32 0xB8018020 0x00000033 ;Precharge WM32 0xA0001000 0xAA55AA55 WM32 0xB8018020 0x00000027 ;Refresh (9 times) WM32 0xA0000000 0xAA55AA55 WM32 0xB8018020 0x00000027 WM32 0xA0000000 0xAA55AA55 WM32 0xB8018020 0x00000027 WM32 0xA0000000 0xAA55AA55 WM32 0xB8018020 0x00000027 WM32 0xA0000000 0xAA55AA55 WM32 0xB8018020 0x00000027 WM32 0xA0000000 0xAA55AA55 WM32 0xB8018020 0x00000027 WM32 0xA0000000 0xAA55AA55 WM32 0xB8018020 0x00000027 WM32 0xA0000000 0xAA55AA55 WM32 0xB8018020 0x00000027 WM32 0xA0000000 0xAA55AA55 WM32 0xB8018020 0x00000027 WM32 0xA0000000 0xAA55AA55 WM32 0xB8018020 0x00000023 ;DDR Mode WM32 0xA0000184 0xAA55AA55 WM32 0xB8028028 0x00000080 ;DDR Timer fast refresh WM32 0xB802802C 0x00000001 ;DDR Timer start WM32 0xB8018010 0x82984840 ;DDR Refresh Enable DELAY 1 WM32 0xB8028038 0x00000000 ;DDR Timer stop WM32 0xB8028034 0x0000040c ;DDR Timer normal refresh WM32 0xB8028038 0x00000001 ;DDR Timer start ; ; Invalidate Caches IVIC 4 512 ;Invalidate IC, 4 way, 512 sets IVDC 4 512 ;Invalidate DC, 4 way, 512 sets ; ; Initialize UART0 WM32 0xB8058004 0 ;Disable UART interrupts WM32 0xB805800C 0x80 ;Set Divisor Latch Access bit WM32 0xB8058000 0x8B ;Set baud rate divisor to 0x28B WM32 0xB8058004 0x2 ;9600bps @ 100MHz WM32 0xB805800C 0x3 ;8n1 - Reset Divisor Latch Access bit WM32 0xB8058008 0xC7 ;FIFO WM32 0xB8050000 0x1F3 ;Set PIO for UART0 [TARGET] JTAGCLOCK 1 ;use 8 MHz JTAG clock CPUTYPE M4KC ;the used target CPU type ENDIAN LITTLE ;target is little endian STARTUP RESET ;stop immediatelly at the boot vector WAKEUP 500 ;give reset time to complete WORKSPACE 0xA0100000 ;workspace in target RAM for fast download BDIMODE AGENT ;the BDI working mode (LOADONLY | AGENT) BREAKMODE HARD ;SOFT or HARD, HARD uses PPC hardware breakpoints STEPMODE HWBP ;JTAG, HWBP or SWBP VECTOR CATCH ;catch all unhandled exceptions [HOST] IP 157.165.159.68 ;Put IP address of your host FILE C:\abatron\vmlinus FORMAT ELF LOAD MANUAL ;load code MANUAL or AUTO after reset PROMPT EB434> ;used prompt [FLASH] WORKSPACE 0xA0000080 ;workspace in target RAM for fast programming algorithm CHIPTYPE AM29BX8 ;Flash type CHIPSIZE 0x800000 ;The size of one flash chip in bytes BUSWIDTH 8 ;The width of the flash memory bus in bits (8 | 16 | 32) FILE C:\abatron\idtrom.prm FORMAT SREC 0xbfc00000 ERASE 0xbfc00000 ERASE 0xbfc10000 ERASE 0xbfc20000 ERASE 0xbfc30000 ERASE 0xbfc40000 ERASE 0xbfc50000 ERASE 0xbfc60000 ERASE 0xbfc70000 ERASE 0xbfc80000 ERASE 0xbfc90000 ERASE 0xbfca0000 ERASE 0xbfcb0000 ERASE 0xbfcc0000 ERASE 0xbfcd0000 ERASE 0xbfce0000 ERASE 0xbfcf0000 [REGS] DMM1 0xFF300000 ;DSU base address DMM2 0xB8000000 ;Memory mapped registers FILE c:\abatron\reg32434.def