;Register definition for PXA320
;==============================
;
; name: user defined name of the register
; type: the type of the register
;	GPR	general purpose register
;	CP15	CP15 register
;	MM	memory mapped register
;	DMMx	direct memory mapped register with offset
;		x = 1..4
;		the base is defined in the configuration file
;		e.g. DMM1 0x02200000
; addr:	the number, adddress or offset of the register
; size	the size of the register (8,16 or 32)
;
;
; CP15 Registers Numbers for xScale:
;
;       +-----+-+-------+-----+-+-------+
;       |opc_2|0|  CRm  |opc_1|0|  nbr  |
;       +-----+-+-------+-----+-+-------+
;
; The 16bit register number is used to build the appropriate MCR/MRC instruction.
;
;
;name		type	addr		size
;-------------------------------------------
;
id		CP15    0x0000          32      ;ID code
cache   	CP15    0x2000          32      ;Cache type
ctr             CP15    0x0001          32      ;Control
aux     	CP15    0x2001          32      ;Auxiliary Control
ttb             CP15    0x0002          32      ;Translation Table Base
dac             CP15    0x0003          32      ;Domain Access Control
fsr     	CP15    0x0005          32      ;Fault Status
far     	CP15    0x0006          32      ;Fault Address
pid        	CP15    0x000d          32      ;Process ID
cpacc      	CP15    0x010f          32      ;Coprocessor Access
;
cclkcfg     	CP14    0x0006          32      ;CCLKCFG Register (CP14 Register 6)
pwrmode     	CP14    0x0007          32      ;PWRMODE Register (CP14 Register 7)
;
;
