;Register definition for IQ80331 ;=============================== ; ; name: user defined name of the register ; type: the type of the register ; GPR general purpose register ; CP15 CP15 register ; MM memory mapped register ; DMMx direct memory mapped register with offset ; x = 1..4 ; the base is defined in the configuration file ; e.g. DMM1 0x02200000 ; addr: the number, adddress or offset of the register ; size the size of the register (8,16 or 32) ; ; ; CP15 Registers Numbers for xScale: ; ; +-----+-+-------+-----+-+-------+ ; |opc_2|0| CRm |opc_1|0| nbr | ; +-----+-+-------+-----+-+-------+ ; ; The 16bit register number is used to build the appropriate MCR/MRC instruction. ; ; ;name type addr size ;------------------------------------------- ; id CP15 0x0000 32 ;ID code cache CP15 0x2000 32 ;Cache type ctr CP15 0x0001 32 ;Control aux CP15 0x2001 32 ;Auxiliary Control ttb CP15 0x0002 32 ;Translation Table Base dac CP15 0x0003 32 ;Domain Access Control fsr CP15 0x0005 32 ;Fault Status far CP15 0x0006 32 ;Fault Address pid CP15 0x000d 32 ;Process ID cpacc CP15 0x010f 32 ;Coprocessor Access ; intctl0 CP6 0x0000 32 ;Interrupt Control Register 0 intctl1 CP6 0x0001 32 ;Interrupt Control Register 1 intstr0 CP6 0x0002 32 ;Interrupt Steering Register 0 intstr1 CP6 0x0003 32 ;Interrupt Steering Register 1 iintsrc0 CP6 0x0004 32 ;IRQ Interrupt Source Register 0 iintsrc1 CP6 0x0005 32 ;IRQ Interrupt Source Register 1 fintsrc0 CP6 0x0006 32 ;FIQ Interrupt Source Register 0 fintsrc1 CP6 0x0007 32 ;FIQ Interrupt Source Register 1 ipr0 CP6 0x0008 32 ;INT Priority 0 ipr1 CP6 0x0009 32 ;INT Priority 1 ipr2 CP6 0x000a 32 ;INT Priority 2 ipr3 CP6 0x000b 32 ;INT Priority 3 intbase CP6 0x000c 32 ;INT Base intsize CP6 0x000d 32 ;INT Size iintvec CP6 0x000e 32 ;IRQ INT Vector fintvec CP6 0x000f 32 ;FIQ INT Vector ; tmr0 CP6 0x0100 32 ;Timer Mode Register 0 tcr0 CP6 0x0102 32 ;Timer Count Register 0 trr0 CP6 0x0104 32 ;Timer Reload Register 0 tmr1 CP6 0x0101 32 ;Timer Mode Register 1 tcr1 CP6 0x0103 32 ;Timer Count Register 1 trr1 CP6 0x0105 32 ;Timer Reload Register 1 tisr CP6 0x0106 32 ;Timer Interrupt Status Register wdtcr CP6 0x0107 32 ;Watch Dog Timer Control Register ; ; ; Bus Interface Unit ; biusr MM 0xffffe600 ;BIU Status Register bear MM 0xffffe604 ;BIU Error Address Register biucr MM 0xffffe608 ;BIU Control Register ; ; ; Memory controller ; sdir MM 0xffffe500 sdcr0 MM 0xffffe504 sdcr1 MM 0xffffe508 sdbr MM 0xffffe50c sbr0 MM 0xffffe510 sbr1 MM 0xffffe514 s32sr MM 0xffffe518 eccr MM 0xffffe51c elog0 MM 0xffffe520 elog1 MM 0xffffe524 ecar0 MM 0xffffe528 ecar1 MM 0xffffe52c ectst MM 0xffffe530 mcisr MM 0xffffe534 mptcr MM 0xffffe53c mpcr MM 0xffffe540 rfr MM 0xffffe548 ; dcalcsr MM 0xfffff500 dcaladdr MM 0xfffff504 ;dcaldata rcvdly MM 0xfffff550 slvlmix0 MM 0xfffff554 slvlmix1 MM 0xfffff558 slvhmix0 MM 0xfffff55c slvhmix1 MM 0xfffff560 slvlen MM 0xfffff564 mastmix MM 0xfffff568 mastlen MM 0xfffff56c ddrdssr MM 0xfffff570 ddrdscr MM 0xfffff574 ddrmpcr MM 0xfffff578 ; ; ; Peripheral Bus Interface Unit ; pbcr MM 0xffffe680 pbbar0 MM 0xffffe688 pblr0 MM 0xffffe68c pbbar1 MM 0xffffe690 pblr1 MM 0xffffe694 pmbr0 MM 0xffffe6c0 pmbr1 MM 0xffffe6e0 pmbr2 MM 0xffffe6e4 pbdscr MM 0xfffff580 ;