; bdiGDB configuration file for PXA2xx Flash programming example
; --------------------------------------------------------------
;
; When programming over the vectors at 0x00000000 make sure
; the alternate vector table at 0xffff0000 is active.
;
;
[INIT]
WCP15   0x010F      0x00002001  ;Enable CP0 and CP13 access
WCP15   0x0001      0x00002078  ;Use exception vectors at 0xffff0000
;


[TARGET]
CPUTYPE         PXA270          ;the target CPU type
JTAGCLOCK       1               ;use 16 MHz JTAG clock
POWERUP         2000            ;start delay after power-up detected in ms
DBGHANDLER      0xFFFF0800      ;debug handler base address
ENDIAN          LITTLE          ;memory model (LITTLE | BIG)
BREAKMODE       HARD            ;SOFT or HARD
VTABLO          0xFFFFFFFF      ;Do not update low  vector table
VTABHI          0xFFFFFFFF      ;Do not update high vector table
WAKEUP          500


[HOST]
IP              151.120.25.119


[FLASH]
WORKSPACE   0x5C000000          ;workspace in internal SRAM
CHIPTYPE    STRATAX16           ;Flash type
CHIPSIZE    0x1000000           ;The size of one flash chip in bytes
BUSWIDTH    32                  ;The width of the flash memory bus in bits (8 | 16 | 32)
FILE        uboot.bin
FORMAT      BIN 0x00000000
ERASE       0x00000000  UNLOCK 1000
ERASE       0x00040000
ERASE       0x00080000
ERASE       0x000C0000
ERASE       0x00100000