; bdiGDB configuration file for IQ80310 board ; ------------------------------------------- ; [INIT] WCP15 0x2001 0x00000001 ;Disable Write Buffer Coalescing WCP15 0x010F 0x00002001 ;Enable CP0 and CP13 access ; ; Init DRAM WM32 0x00001508 0xA0000000 ;SDBR: Set SDRAM Base Address WM32 0x00001504 0x00000AA0 ;SDCR: 1 single-sided DIMM WM32 0x0000150C 0x00000008 ;SBR0: 1 bank 32MB WM32 0x00001510 0x00000008 ;SBR1: 1 bank 32MB WM32 0x00001568 0x00000000 ;RFR : Diables Refresh Cycle WM32 0x00001500 0x00000003 ;SDIR: Issue NOP cmd to SDRAM DELAY 10 ;delay after the NOP command WM32 0x00001568 0x00000600 ;RFR : Set Refresh Rate WM32 0x00001500 0x00000002 ;SDIR: Precharge all WM32 0x00001500 0x00000004 ;SDIR: Auto Refresh #1 WM32 0x00001500 0x00000004 ;SDIR: Auto Refresh #2 WM32 0x00001500 0x00000004 ;SDIR: Auto Refresh #3 WM32 0x00001500 0x00000004 ;SDIR: Auto Refresh #4 WM32 0x00001500 0x00000004 ;SDIR: Auto Refresh #5 WM32 0x00001500 0x00000004 ;SDIR: Auto Refresh #6 WM32 0x00001500 0x00000004 ;SDIR: Auto Refresh #7 WM32 0x00001500 0x00000004 ;SDIR: Auto Refresh #8 WM32 0x00001500 0x00000000 ;SDIR: Send Mode Reg Set Cmd with CAS Latency 2 WM32 0x00001500 0x00000006 ;SDIR: Issue a Normal Operation command ; [TARGET] CPUTYPE IOP310 ;the target CPU type JTAGCLOCK 1 ;use 16 MHz JTAG clock DBGHANDLER 0xFFFF0800 ;debug handler base address ;DBGHANDLER 0x00000000 ;debug handler base address ;DBGHANDLER 0x01FEF800 ;debug handler base address ;DBGHANDLER 0xFE000800 ;debug handler base address ENDIAN LITTLE ;memory model (LITTLE | BIG) BREAKMODE SOFT ;SOFT or HARD ;VECTOR CATCH 0xDE ;trap all vectors [HOST] IP 151.120.25.119 FILE E:\cygwin\home\bdidemo\xscale\i_osloader.elf FORMAT ELF ;FILE E:\cygwin\home\bdidemo\xscale\vmlinuz-intel-iq80310 ;FORMAT BIN 0xA1000000 ;START 0xA1000000 LOAD MANUAL ;load code code MANUAL or AUTO after reset [FLASH] WORKSPACE 0xa0020000 ;workspace in target RAM for fast programming algorithm CHIPTYPE STRATAX8 ;Flash type CHIPSIZE 0x800000 ;The size of one flash chip in bytes BUSWIDTH 8 ;The width of the flash memory bus in bits (8 | 16 | 32) FILE E:\cygwin\home\bdidemo\xscale\monitor.bin ;FILE E:\cygwin\home\bdidemo\xscale\iq80310.cfg FORMAT BIN 0x00082000 ERASE 0x00080000 ;erase sector 4 ERASE 0x000A0000 ;erase sector 5 ERASE 0x000C0000 ;erase sector 6 ERASE 0x000E0000 ;erase sector 7 ERASE 0x00100000 ;erase sector 8 ERASE 0x00120000 ;erase sector 9 ERASE 0x00140000 ;erase sector 10 ERASE 0x00160000 ;erase sector 11 ERASE 0x00180000 ;erase sector 12 ERASE 0x001A0000 ;erase sector 13 ERASE 0x001C0000 ;erase sector 14 ERASE 0x001E0000 ;erase sector 15 [REGS] FILE E:\cygwin\home\bdidemo\xscale\reg80310.def