; bdiGDB configuration file for Cogent CSB226 Board
; -------------------------------------------------
;
[INIT]
WCP15   0x010F      0x00002001  ;Enable CP0 and CP13 access
;
; setup memory controller
WM32    0x48000008  0x2ef15af0  ; MSC0
WM32    0x4800000C  0x00003ff4  ; MSC1
;WM32    0x48000008  0x2ef025d0  ;MSC0
;WM32    0x4800000C  0x3f643f64  ;MSC1
;WM32    0x48000010  0x00003f60  ;MSC2
;
WM32    0x48000004  0x03ca4fff  ;MDREF  : chip default
WM32    0x48000004  0x03ca4030  ;MDREF  : REF Rate = (64MS/4096 Rows)/32 = 48
WM32    0x48000004  0x03cf6030  ;MDREF  : Set Clock Run Bits
WM32    0x48000004  0x038f6030  ;MDREF  : Clear Self Refresh
WM32    0x48000004  0x038ff030  ;MDREF  : Set E0PIN and E1PIN
WM32    0x48000000  0x09a809a8  ;MDCNFG : don't enable just yet
DELAY   20
WM32    0xA0000000  0xA0000000  ;access SDRAM
WM32    0xA0000000  0xA0000000  ;access SDRAM
WM32    0xA0000000  0xA0000000  ;access SDRAM
WM32    0xA0000000  0xA0000000  ;access SDRAM
WM32    0xA0000000  0xA0000000  ;access SDRAM
WM32    0xA0000000  0xA0000000  ;access SDRAM
WM32    0xA0000000  0xA0000000  ;access SDRAM
WM32    0xA0000000  0xA0000000  ;access SDRAM
WM32    0xA0000000  0xA0000000  ;access SDRAM
WM32    0x48000000  0x09a909a9  ;MDCNFG : now enable SDRAM
WM32    0x48000040  0x00220022  ;MDMRS  : and do a MRS
;
;FILL    0xA0000000  0x02000000  ;fill SDRAM
;
;       === Define the valid memory map ===
;MMAP    0x00000000  0x03FFFFFF  ;Memory range for 64MB Flash
;MMAP    0xA0000000  0xA3FFFFFF  ;Memory range for 64MB SDRAM
;MMAP    0x40000000  0x4BFFFFFF  ;Memory range for MMIO
;

[TARGET]
CPUTYPE         PXA250          ;the target CPU type
JTAGCLOCK       1               ;use 16 MHz JTAG clock
POWERUP         2000            ;start delay after power-up detected in ms
TRST            PUSHPULL        ;TRST driver type (OPENDRAIN | PUSHPULL)
RESET	        100 	        ;reset time (ms)
;WAKEUP          1000            ;wait after releasing reset
DBGHANDLER      0xFFFF0800      ;debug handler base address
;DBGHANDLER      0x00000000      ;debug handler base address
;DBGHANDLER      0x01FEF800      ;debug handler base address
;DBGHANDLER      0xFE000800      ;debug handler base address
ENDIAN          LITTLE          ;memory model (LITTLE | BIG)
BREAKMODE       SOFT            ;SOFT or HARD
VECTOR          CATCH 0xDE      ;trap all vectors
;VTABLO          0xEA000014      ;Use fixed vectors "b xxx"
VTABLO          0xe59ff014      ;Use fixed vectors "ldr pc, [pc, #14]"
VTABHI          0xffffffff      ;Do not update relocated vector table

[HOST]
IP              151.120.25.119
FILE            E:\cygwin\home\demo\xscale\fibo.x
FORMAT          ELF
LOAD            MANUAL          ;load code code MANUAL or AUTO after reset
PROMPT          CSB226>

[FLASH]
WORKSPACE   0xA0000000          ;workspace in target RAM for fast programming algorithm
CHIPTYPE    STRATAX16           ;Flash type
;CHIPTYPE    I28BX16           ;Flash type
CHIPSIZE    0x1000000           ;The size of one flash chip in bytes
BUSWIDTH    32                  ;The width of the flash memory bus in bits (8 | 16 | 32)
;FILE        E:\cygwin\home\bdidemo\xscale\regPXA250.def
;FORMAT      BIN 0x00100000
;ERASE       0x00100000  ;erase sector 4

FILE        E:\cygwin\home\bdidemo\xscale\csb226\u-boot.bin
FORMAT      BIN 0x00100000
;ERASE       0x00000000
;ERASE       0x00040000
;ERASE       0x00080000
;ERASE       0x000C0000
;ERASE       0x00100000 UNLOCK 1000
;ERASE       0x00140000
;ERASE       0x00180000
;ERASE       0x001C0000
ERASE       0x00100000 0x40000 4


[REGS]
FILE	    $regPXA250.def