JTAG clock selection:
=====================

The BDI3000 is compatible with the BDI2000 configuration files
except for the JTAG clock selection. The same JTAG clock number
selects a faster clock on the BDI3000 than on the BDI2000.
But normally you can run with the faster JTAG clock.


Increase access delays:
=======================

Because the BDI3000 executes its code quite faster it maybe
necessary to increase or add access delays where possible.

For MIPS targets you may add a JTAGDELAY entry:

JTAGDELAY   6          ;48 TCK's access delay


For Cortex-A8 you may have to increase memory access delays:

MEMACCESS   CORE  10   ;memory access via core (80 TCK's access delay)
MEMACCESS   AHB   8    ;memory access via AHB  (64 TCK's access delay)


Add a wakeup delay:
===================

If a reset sequence fails that worked with a BDI2000,
try to add a wakeup delay. This maybe the case if there 
is a slow rising reset signal on your board.

WAKEUP      100        ;give reset time to complete


PPC4xx: Let PC point to fast memory:
====================================

During download/programming the BDI does not check if the previous
store instruction has completed. This in order to get a fast download
rate. It seems that the 4xx core does always a prefetch to the 
current PC and if the PC points to slow memory (boot flash) the
BDI3000 overruns the 4xx core. In order to prevent this, add an
entry to the BDI init list that lets the PC point to fast memory.
For example to SDRAM or internal SRAM.

[INIT]
; Setup TLB
WTLB    0xF0000095  0x1F00003F  ;Boot Space 256MB
WTLB    0x00000094  0x0000003F  ;SDRAM 256MB @ 0x00000000
WTLB    0x80000095  0x0800003F  ;internal SRAM 256KB
;
WREG	PC	    0x80000000  ;let PC point to fast memory
;
...