;bdiGDB configuration file for P4080-DS
;--------------------------------------
;
;
[INIT]
;
; Release cores for booting
WM32    0xfe0e00e4      0x00000007      ;BRR:
;

[TARGET]
; common parameters
POWERUP     5000                ;start delay after power-up detected in ms
JTAGCLOCK   1                   ;use 16 MHz JTAG clock
WAKEUP      200                 ;give reset time to complete
;
;========================================================
; !!!! define the core ID (the #x) without any holes !!!!
; !!!! no need that core ID matches the core number  !!!!
; !!!! A valid example is: #1 CPUTYPE  P4080 5 0     !!!!
;========================================================
;
; Core#0 parameters (active vCPU after reset)
#0 CPUTYPE      P4080 0 0       ;Core0 / SOC0
#0 STARTUP      HALT            ;halt at the reset vector (this halts all cores !!!)
;#0 STARTUP      STOP 5000       ;let U-boot setup the system
#0 BREAKMODE    HARD            ;SOFT or HARD, HARD uses PPC hardware breakpoint
#0 STEPMODE     HWBP            ;ICMP or HWBP, HWBP uses a hardware breakpoint
;
;
; Core#1 parameters
#1 CPUTYPE      P4080 1 0       ;Core1 / SOC0
#1 STARTUP      HALT            ;halt at the reset vector
;
; Core#2 parameters
#2 CPUTYPE      P4080 2 0       ;Core2 / SOC0
#2 STARTUP      HALT            ;halt at the reset vector
;


[HOST]
IP              151.120.25.112
;
#0 PROMPT       P4080#0>
#1 PROMPT       P4080#1>
#2 PROMPT       P4080#2>
#3 PROMPT       P4080#3>
#4 PROMPT       P4080#4>
#5 PROMPT       P4080#5>
#6 PROMPT       P4080#6>
#7 PROMPT       P4080#7>
;

[FLASH]


[REGS]
FILE        $regP4080.def