;bdiGDB configuration file for MPC8641 Evaluation Platform (MCEVALHPCN-8641D)
;----------------------------------------------------------------------------
;
; Processor used is Rev. 2:
; - IDCODE  : 0x0009001D
; - SVR     : 0x80900120
; - PVR     : 0x80040202
;
; The register values used to configure the system
; are the ones U-boot uses to setup this system.
; Your system may need different values !!!
;
;
[INIT]
; init core register
#0 WREG    MSR             0x00001002      ;MSR : ME,RI
#0 WSPR    1008            0x84000000      ;HID0: disable cache, set TBEN bit
#0 WSPR    1017            0x00000000      ;L2CR: disable L2 cache
;
;#1 WREG    MSR             0x00001002      ;MSR : ME,RI
;#1 WSPR    1008            0x84000000      ;HID0: disable cache, set TBEN bit
;
; Move CCSRBAR to 0xf8000000
WM32    0xff700000      0x000f8000      ;CCSRBAR to 0xf8000000
;
; Initialize LAWBAR's
WM32    0xf8000C08      0x00000000      ;LAWBAR0:
WM32    0xf8000C10      0x00000000      ;LAWAR0 :
WM32    0xf8000C28      0x00000000      ;LAWBAR1: @0x00000000
WM32    0xf8000C30      0x80f0001d      ;LAWAR1 : DDR/SDRAM  1024MB
WM32    0xf8000C48      0x00080000      ;LAWBAR2:
WM32    0xf8000C50      0x8000001c      ;LAWAR2 :
WM32    0xf8000C68      0x000c0000      ;LAWBAR3:
WM32    0xf8000C70      0x80c0001b      ;LAWAR3 :
WM32    0xf8000C88      0x000f8100      ;LAWBAR4:
WM32    0xf8000C90      0x80400014      ;LAWAR4 :
WM32    0xf8000CA8      0x000e2000      ;LAWBAR5:
WM32    0xf8000CB0      0x80000017      ;LAWAR5 :
WM32    0xf8000CC8      0x000e3000      ;LAWBAR6:
WM32    0xf8000CD0      0x00100017      ;LAWAR6 :
WM32    0xf8000CE8      0x000fe000      ;LAWBAR7:
WM32    0xf8000CF0      0x80400018      ;LAWAR7 :
WM32    0xf8000D08      0x00040000      ;LAWBAR8:
WM32    0xf8000D10      0x8160001d      ;LAWAR8 :
WM32    0xf8000D28      0x00000000      ;LAWBAR9:
WM32    0xf8000D30      0x00000000      ;LAWAR9 :
;
; Setup Local Bus
WM32    0xf8005000      0xff001001      ;BR0
WM32    0xf8005004      0xff006ff7      ;OR0
WM32    0xf8005008      0xfe001001      ;BR1
WM32    0xf800500C      0xff006ff7      ;OR1
WM32    0xf8005010      0xf8201001      ;BR2
WM32    0xf8005014      0xff006ff7      ;OR2
WM32    0xf8005018      0xf8100801      ;BR3
WM32    0xf800501C      0xff006ff7      ;OR3
;
; Setup DDR (based on U-boot)
WM32    0xf8002000      0x0000001f      ;CS0_BNDS
WM32    0xf8002080      0x80010202      ;CS0_CONFIG
WM32    0xf8002008      0x0020003f      ;CS1_BNDS
WM32    0xf8002084      0x80010202      ;CS1_CONFIG
WM32    0xf8002104      0x00260802      ;TIMING_CFG_0
WM32    0xf8002108      0x4c47a432      ;TIMING_CFG_1
WM32    0xf800210C      0x04184cce      ;TIMING_CFG_2
WM32    0xf8002100      0x00010000      ;TIMING_CFG_3
WM32    0xf8002110      0x03000000      ;DDR_SDRAM_CFG
WM32    0xf8002114      0x24000010      ;DDR_SDRAM_CFG_2
WM32    0xf8002118      0x00400642      ;DDR_SDRAM_MODE
WM32    0xf800211C      0x00000000      ;DDR_SDRAM_MODE_2
WM32    0xf8002124      0x08200100      ;DDR_SDRAM_IVAL
WM32    0xf8002128      0xdeadbeef      ;DDR_DATA_INIT
WM32    0xf8002130      0x03800000      ;DDR_SDRAM_CLK_CNTL
WM32    0xf8002148      0x00000000      ;DDR_INIT_ADDR
WM32    0xf800214C      0x00000000      ;DDR_INIT_EXT_ADDR
DELAY   200
WM32    0xf8002110      0xc3000000      ;DDR_SDRAM_CFG
DELAY   500
;
; Write a valid instruction to vector 0x700 to make SW breakpoints working
WM32    0x00000700      0x60000000      ;write NOP instruction
WM32    0x00000704      0x4C000064      ;write RFI instruction

[TARGET]
CPUTYPE     8641                ;the CPU type
JTAGCLOCK   1                   ;use 16 MHz JTAG clock
STARTUP     HALT                ;only core#0 will be handled
;STARTUP     HALT  HALT          ;halt both core at the reset vector
;BREAKMODE   HARD V              ;SOFT or HARD, V forces setting of IABR[TE]
BREAKMODE   SOFT                ;SOFT or HARD, V forces setting of IABR[TE]
STEPMODE    HWBP                ;TRACE or HWBP, HWBP uses a hardware breakpoint
WAKEUP      500


[HOST]
IP          151.120.25.119
FILE        E:\cygwin\home\demo\mpc86xx\fibo.elf
FORMAT      ELF
LOAD        MANUAL
PROMPT      8641>


[FLASH]
CHIPTYPE    MIRRORX16                   ;Flash is S29GL064M Model R6
CHIPSIZE    0x800000
BUSWIDTH    16
WORKSPACE   0x00002000                  ;workspace in SDRAM
FILE        E:\temp\dump512k.bin
FORMAT      BIN  0xffc00000
ERASE       0xffc00000 0x10000 8        ;erase 8 sectors


[REGS]
FILE        $mpc8641.def