;bdiGDB configuration file for MPC8536 flash boot code debugging
;---------------------------------------------------------------
;
;
[INIT]
;
; Let debug vector point to a valid instruction in flash
WSPR    63              0xffff0000      ;IVPR   : Exceptions at 0xffff0000
WSPR    415             0x0000f000      ;IVOR15 : Debug exception
;

[TARGET]
CPUTYPE     8536        ;the CPU type
JTAGCLOCK   0           ;use 16 MHz JTAG clock
STARTUP     HALT        ;halt core while HRESET is asserted
BREAKMODE   HARD        ;SOFT or HARD, HARD uses PPC hardware breakpoint
STEPMODE    HWBP        ;JTAG or HWBP, HWPB uses a hardware breakpoint
WAKEUP      200         ;give reset time to complete
POWERUP     5000        ;start delay after power-up detected in ms
ROMLOC      6           ;override Boot ROM Location and disable Boot Sequencer


[HOST]
IP          151.120.25.119
PROMPT      boot8536>


[FLASH]


[REGS]
FILE        $reg8536.def