; bdiGDB configuration file for MPC8323E-MDS board
; ------------------------------------------------
;
[INIT]
; init core register
WREG    MSR             0x00001002      ;MSR  : ME,RI


[TARGET]
CPUTYPE     8323                        ;the CPU type
JTAGCLOCK   1                           ;use 16 MHz JTAG clock
POWERUP     2000                        ;start delay after power-up detected in ms
WAKEUP      500                         ;give reset time to complete
STARTUP     STOP 5000                   ;let U-boot setup the system
;STARTUP     RESET                       ;halt immediately at the boot vector
;RCW         0x84600000 0x42040083       ;override reset configuration words
;BOOTADDR    0xfff00100                  ;boot address used for start-up break
BOOTADDR    0x00000100                  ;boot address used for start-up break
BREAKMODE   HARD      	                ;SOFT or HARD, HARD uses PPC hardware breakpoint
STEPMODE    HWBP                        ;TRACE or HWBP, HWBP uses a hardware breakpoint


[HOST]
IP          151.120.25.119
FILE        E:\cygwin\home\demo\mpc83xx\fibo.elf
FORMAT      ELF
;FILE        E:\temp\dump512k.bin
;FORMAT      BIN 0x10000
LOAD        MANUAL      ;load code MANUAL or AUTO after reset
PROMPT      8323>

[FLASH]
;CHIPTYPE    STRATAX16   ;Flash type: Micron Q-Flash MT28F640J3
CHIPTYPE    AM29BX16
CHIPSIZE    0x800000    ;The size of one flash chip in bytes
BUSWIDTH    16          ;The width of the flash memory bus in bits (8 | 16 | 32 | 64)
WORKSPACE   0x1000      ;workspace in DDR RAM
FILE        E:\temp\dump16k.bin
;FORMAT      BIN 0xfe100000
FORMAT      BIN 0x00100000
;ERASE       0xfe100000  ;erase sector 8
;ERASE       0xfe120000  ;erase sector 9
;ERASE       0xfe140000  ;erase sector 10
;ERASE       0xfe160000  ;erase sector 11
ERASE       0xfe100000 0x20000 3 ; erase 3 sectors


[REGS]
FILE        $reg8323e.def