;Register definition for MPC8220 ;=============================== ; ; name: user defined name of the register ; type: the type of the register ; GPR general purpose register ; SPR special purpose register ; MM memory mapped register ; MBAR memory mapped based on JTAG readable MBAR ; DMMx direct memory mapped register with offset ; x = 1..4 ; the base is defined in the configuration file ; e.g. DMM1 0x02200000 ; IMMx indirect memory mapped register ; x = 1..4 ; the addr and data address is defined in the configuration file ; e.g. IMM1 0xFEC00000 0xFEE00000 ; addr: the number, adddress or offset of the register ; size the size of the register (8,16 or 32) ; ;name type addr size ;------------------------------------------- ; sp GPR 1 ; xer SPR 1 lr SPR 8 ctr SPR 9 dsisr SPR 18 dar SPR 19 dec SPR 22 sdr1 SPR 25 srr0 SPR 26 srr1 SPR 27 csrr0 SPR 58 csrr1 SPR 59 ; tbl SPR 268 tbu SPR 269 sprg0 SPR 272 sprg1 SPR 273 sprg2 SPR 274 sprg3 SPR 275 sprg4 SPR 276 sprg5 SPR 277 sprg6 SPR 278 sprg7 SPR 279 ear SPR 282 svr SPR 286 pvr SPR 287 ; ibcr SPR 309 dbcr SPR 310 mbarspr SPR 311 dabr2 SPR 317 ; ibat0u SPR 528 ibat0l SPR 529 ibat1u SPR 530 ibat1l SPR 531 ibat2u SPR 532 ibat2l SPR 533 ibat3u SPR 534 ibat3l SPR 535 ; dbat0u SPR 536 dbat0l SPR 537 dbat1u SPR 538 dbat1l SPR 539 dbat2u SPR 540 dbat2l SPR 541 dbat3u SPR 542 dbat3l SPR 543 ; ibat4u SPR 560 ibat4l SPR 561 ibat5u SPR 562 ibat5l SPR 563 ibat6u SPR 564 ibat6l SPR 565 ibat7u SPR 566 ibat7l SPR 567 ; dbat4u SPR 568 dbat4l SPR 569 dbat5u SPR 570 dbat5l SPR 571 dbat6u SPR 572 dbat6l SPR 573 dbat7u SPR 574 dbat7l SPR 575 ; dmiss SPR 976 dcmp SPR 977 imiss SPR 980 icmp SPR 981 rpa SPR 982 ; hid0 SPR 1008 hid1 SPR 1009 iabr SPR 1010 hid2 SPR 1011 ; dabr SPR 1013 iabr2 SPR 1018 ; ; ; Memory Map Registers (MMAP) mbar MBAR 0x00000 32 sdramds MBAR 0x00004 32 cs0cfg MBAR 0x00020 32 cs1cfg MBAR 0x00024 32 cs2cfg MBAR 0x00028 32 cs3cfg MBAR 0x0002c 32 cs4cfg MBAR 0x00030 32 cs5cfg MBAR 0x00034 32 rstctrl MBAR 0x00040 32 rststat MBAR 0x00044 32 jtagid MBAR 0x00050 32 ; ; SDRAMC Register sdramc_mode MBAR 0x00100 32 sdramc_ctrl MBAR 0x00104 32 sdramc_cfg1 MBAR 0x00108 32 sdramc_cfg2 MBAR 0x0010C 32 ; ; XLB Arbiter xlb_acfg MBAR 0x00240 32 xlb_ver MBAR 0x00244 32 xlb_sta MBAR 0x00248 32 xlb_inten MBAR 0x0024C 32 xlb_adrcap MBAR 0x00250 32 xlb_sigcap MBAR 0x00254 32 xlb_adrto MBAR 0x00258 32 xlb_datto MBAR 0x0025C 32 xlb_busto MBAR 0x00260 32 xlb_prien MBAR 0x00264 32 xlb_pri MBAR 0x00268 32 xlb_bar MBAR 0x0026C 32 ; ; SYSPLL / PMM / VDOPLL spcr MBAR 0x00300 32 vpcr MBAR 0x00400 32 vpodr MBAR 0x00404 32 ; ; FlexBus csar0 MBAR 0x00500 32 csmr0 MBAR 0x00504 32 cscr0 MBAR 0x00508 32 csar1 MBAR 0x0050c 32 csmr1 MBAR 0x00510 32 cscr1 MBAR 0x00514 32 csar2 MBAR 0x00518 32 csmr2 MBAR 0x0051c 32 cscr2 MBAR 0x00520 32 csar3 MBAR 0x00524 32 csmr3 MBAR 0x00528 32 cscr3 MBAR 0x0052c 32 csar4 MBAR 0x00530 32 csmr4 MBAR 0x00534 32 cscr4 MBAR 0x00538 32 csar5 MBAR 0x0053c 32 csmr5 MBAR 0x00540 32 cscr5 MBAR 0x00544 32 ; ; Pin Multiplexing pcfg0 MBAR 0x00600 32 pcfg1 MBAR 0x00604 32 pcfg2 MBAR 0x00608 32 pcfg3 MBAR 0x0060c 32 ; ; Interrupt Controller pimsk MBAR 0x00700 32 prisel1 MBAR 0x00704 32 prisel2 MBAR 0x00708 32 prisel3 MBAR 0x0070C 32 irqctl MBAR 0x00710 32 cprimmsk MBAR 0x00714 32 mpri1 MBAR 0x00718 32 mpri2 MBAR 0x0071C 32 istaec MBAR 0x00724 32 cstab MBAR 0x00728 32 mstab MBAR 0x0072C 32 pstab MBAR 0x00730 32 buserror MBAR 0x00738 32 tst0 MBAR 0x0073C 32 tst1 MBAR 0x00740 32 tst2 MBAR 0x00744 32 tst3 MBAR 0x00748 32 ; ; General PurposeTimers gms0 MBAR 0x00800 32 gcir0 MBAR 0x00804 32 gpwm0 MBAR 0x00808 32 gsr0 MBAR 0x0080C 32 gms1 MBAR 0x00810 32 gcir1 MBAR 0x00814 32 gpwm1 MBAR 0x00818 32 gsr1 MBAR 0x0081C 32 gms2 MBAR 0x00820 32 gcir2 MBAR 0x00824 32 gpwm2 MBAR 0x00828 32 gsr2 MBAR 0x0082C 32 ; ; Slice Timers stcnt0 MBAR 0x00900 32 scr0 MBAR 0x00904 32 scnt0 MBAR 0x00908 32 ssr0 MBAR 0x0090C 32 stcnt1 MBAR 0x00910 32 scr1 MBAR 0x00914 32 scnt1 MBAR 0x00918 32 ssr1 MBAR 0x0091C 32 ; ; General Purpose I/O gpioout MBAR 0x00a00 32 gpioobs MBAR 0x00a04 32 gpioobc MBAR 0x00a08 32 gpioobt MBAR 0x00a0C 32 gpioen MBAR 0x00a10 32 gpioebs MBAR 0x00a14 32 gpioebc MBAR 0x00a18 32 gpioebt MBAR 0x00a1C 32 gpiomc MBAR 0x00a20 32 gpiost MBAR 0x00a24 32 gpioint MBAR 0x00a28 32 ; ; PCI General Control/Status pciidr MBAR 0x00b00 32 pciscr MBAR 0x00b04 32 pciccrir MBAR 0x00b08 32 pcicr1 MBAR 0x00b0C 32 pcibar0 MBAR 0x00b10 32 pcibar1 MBAR 0x00b14 32 pciccpr MBAR 0x00b28 32 pcisid MBAR 0x00b2C 32 pcierbar MBAR 0x00b30 32 pcicpr MBAR 0x00b34 32 pcicr2 MBAR 0x00b3C 32 pcigscr MBAR 0x00b60 32 pcitbatr0 MBAR 0x00b64 32 pcitbatr1 MBAR 0x00b68 32 pcitcr MBAR 0x00b6C 32 pciiw0btar MBAR 0x00b70 32 pciiw1btar MBAR 0x00b74 32 pciiw2btar MBAR 0x00b78 32 pciiwcr MBAR 0x00b80 32 pciicr MBAR 0x00b84 32 pciisr MBAR 0x00b88 32 pcicar MBAR 0x00bF8 32 ; ; PCI Bus Arbiter pacr MBAR 0x00c00 32 pasr MBAR 0x00c00 32 ; ; Comm Timer Module ctcr0 MBAR 0x07f00 32 ctcr1 MBAR 0x07f04 32 ctcr2 MBAR 0x07f08 32 ctcr3 MBAR 0x07f0c 32 ctcr4 MBAR 0x07f10 32 ctcr5 MBAR 0x07f14 32 ctcr6 MBAR 0x07f18 32 ctcr7 MBAR 0x07f1c 32 ; ; Multi-Channel DMA dma_taskb MBAR 0x08000 32 dma_cp MBAR 0x08004 32 dma_ep MBAR 0x08008 32 dma_vp MBAR 0x0800C 32 dma_ptd MBAR 0x08010 32 dma_ipr MBAR 0x08014 32 dma_imr MBAR 0x08018 32 ; dma_tcr0 MBAR 0x0801c 16 dma_tcr1 MBAR 0x0801e 16 dma_tcr2 MBAR 0x08020 16 dma_tcr3 MBAR 0x08022 16 dma_tcr4 MBAR 0x08024 16 dma_tcr5 MBAR 0x08026 16 dma_tcr6 MBAR 0x08028 16 dma_tcr7 MBAR 0x0802a 16 dma_tcr8 MBAR 0x0802c 16 dma_tcr9 MBAR 0x0802e 16 dma_tcr10 MBAR 0x08030 16 dma_tcr11 MBAR 0x08032 16 dma_tcr12 MBAR 0x08034 16 dma_tcr13 MBAR 0x08036 16 dma_tcr14 MBAR 0x08038 16 dma_tcr15 MBAR 0x0803a 16 ; dma_ipr0 MBAR 0x0803c 8 dma_ipr1 MBAR 0x0803d 8 dma_ipr2 MBAR 0x0803e 8 dma_ipr3 MBAR 0x0803f 8 dma_ipr4 MBAR 0x08040 8 dma_ipr5 MBAR 0x08041 8 dma_ipr6 MBAR 0x08042 8 dma_ipr7 MBAR 0x08043 8 dma_ipr8 MBAR 0x08044 8 dma_ipr9 MBAR 0x08045 8 dma_ipr10 MBAR 0x08046 8 dma_ipr11 MBAR 0x08047 8 dma_ipr12 MBAR 0x08048 8 dma_ipr13 MBAR 0x08049 8 dma_ipr14 MBAR 0x0804a 8 dma_ipr15 MBAR 0x0804b 8 dma_ipr16 MBAR 0x0804c 8 dma_ipr17 MBAR 0x0804d 8 dma_ipr18 MBAR 0x0804e 8 dma_ipr19 MBAR 0x0804f 8 dma_ipr20 MBAR 0x08050 8 dma_ipr21 MBAR 0x08051 8 dma_ipr22 MBAR 0x08052 8 dma_ipr23 MBAR 0x08053 8 dma_ipr24 MBAR 0x08054 8 dma_ipr25 MBAR 0x08055 8 dma_ipr26 MBAR 0x08056 8 dma_ipr27 MBAR 0x08057 8 dma_ipr28 MBAR 0x08058 8 dma_ipr29 MBAR 0x08059 8 dma_ipr30 MBAR 0x0805a 8 dma_ipr31 MBAR 0x0805b 8 ; dma_rmcr MBAR 0x0805c 32 dma_tsksz0 MBAR 0x08060 32 dma_tsksz1 MBAR 0x08064 32 ; ; PCI Communication System Interface pcitpsr MBAR 0x08400 32 pcitsar MBAR 0x08404 32 pcittcr MBAR 0x08408 32 pciter MBAR 0x0840C 32 pcitnar MBAR 0x08410 32 pcitlwr MBAR 0x08414 32 pcitdcr MBAR 0x08418 32 pcitsr MBAR 0x0841C 32 pcitfdr MBAR 0x08440 32 pcitfsr MBAR 0x08444 32 pcitfcr MBAR 0x08448 32 pcitfar MBAR 0x0844C 32 pcitfrpr MBAR 0x08450 32 pcitfwpr MBAR 0x08454 32 pcitflrfpr MBAR 0x08458 32 pcitflwfpr MBAR 0x0845C 32 pcirpsr MBAR 0x08480 32 pcirsar MBAR 0x08484 32 pcirtcr MBAR 0x08488 32 pcirer MBAR 0x0848C 32 pcirnar MBAR 0x08490 32 pcirlwr MBAR 0x08494 32 pcirdcr MBAR 0x08498 32 pcirsr MBAR 0x0849C 32 pcirfdr MBAR 0x084C0 32 pcirfsr MBAR 0x084C4 32 pcirfcr MBAR 0x084C8 32 pcirfar MBAR 0x084CC 32 pcirfrpr MBAR 0x084D0 32 pcirfwpr MBAR 0x084D4 32 pcirflrfpr MBAR 0x084D8 32 pcirflwfpr MBAR 0x084DC 32 ; ; 32-Kbyte System SRAM sscr MBAR 0x1ffc0 32 tccrxm MBAR 0x1ffc4 32 tccrdr MBAR 0x1ffc8 32 tccrdw MBAR 0x1ffcc 32 tccrpf MBAR 0x1ffd0 32