; bdiGDB configuration file for PQ2FADS-ZU board ; ---------------------------------------------- ; [INIT] ; init core register WREG MSR 0x00001002 ;MSR : ME,RI WM32 0x0F010004 0xFFFFFFC3 ;SYPCR: disable watchdog WM32 0x0F0101A8 0x04700000 ;IMMR : internal space @ 0x04700000 ;WM32 0x04710024 0x100C0000 ;BCR : Single PQ2, .. WM32 0x04710c94 0x00000001 ;RMR : checkstop reset enable ; ; init memory controller WM32 0x04710104 0xFF800876 ;OR0: Flash 8MB, CS early negate, 11 w.s., Timing relax WM32 0x04710100 0xFF801801 ;BR0: Flash @0xFF800000, 32bit, no parity WM32 0x0471010C 0xFFFF8010 ;OR1: BCSR 32KB, all types access, 1 w.s. WM32 0x04710108 0x04501801 ;BR1: BCSR @0x04500000, 32bit, no parity WM32 0x04710124 0xFFFF8866 ;OR4: EEPROM 32KB, all types access, 6 w.s. WM32 0x04710120 0xC2000801 ;BR4: EEPROM @0xC2000000, 8bit, no parity ; init SDRAM Init (PPC bus) WM16 0x04710184 0x2800 ;MPTPR: Divide Bus clock by 41 WM8 0x0471019C 0x13 ;PSRT : Divide MPTPR output by 20 WM32 0x04710114 0xfe002ec0 ;OR2 : 32MB, 2 banks, row start at A9, 11 rows WM32 0x04710110 0x00000041 ;BR2 : SDRAM @0x00000000, 64bit, no parity WM32 0x04710190 0x824b36a3 ;PSDMR: Precharge all banks WM32 0x04710190 0xaa4b36a3 WM8 0x00000000 0x00 ;Access SDRAM WM32 0x04710190 0x8a4b36a3 ;PSDMR: CBR Refresh WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM32 0x04710190 0x9a4b36a3 ;PSDMR: Mode Set WM8 0x00000190 0x00 ;Access SDRAM WM32 0x04710190 0xc24b36a3 ;PSDMR: enable refresh, normal operation ; init Local Bus SDRAM (100MHz) WM8 0x047101a4 0x13 ;LSRT WM32 0x0471011c 0xff803280 ;OR3 WM32 0x04710118 0xd0001861 ;BR3 WM32 0x04710194 0x828737a3 ;LSDMR: Precharge all banks WM32 0x04710194 0xaa8737a3 WM8 0xd0000000 0x00 ;Access SDRAM WM32 0x04710194 0x8a8737a3 ;LSDMR: CBR Refresh WM8 0xd0000000 0xFF ;Access SDRAM WM8 0xd0000000 0xFF ;Access SDRAM WM8 0xd0000000 0xFF ;Access SDRAM WM8 0xd0000000 0xFF ;Access SDRAM WM32 0x04710194 0x9a8737a3 ;LSDMR: Mode Set WM8 0xd00000cc 0x00 ;Access SDRAM WM32 0x04710194 0xc28737a3 ;LSDMR: enable refresh, normal operation [TARGET] CPUTYPE 8280 ;the CPU type JTAGCLOCK 1 ;use 16 MHz JTAG clock POWERUP 7000 ;start delay after power-up detected in ms BOOTADDR 0xfff00100 ;boot address used for start-up break WORKSPACE 0x04700000 ;workspace in target RAM for fast download ;MEMDELAY 2000 ;additional memory access delay [HOST] IP 151.120.25.119 ;FILE E:\cygwin\home\bdidemo\mpc8260\vxworks FILE E:\cygwin\home\demo\mpc860\fibo.elf FORMAT ELF ;FILE E:\temp\test16k.bin ;FORMAT BIN 0x04708000 LOAD MANUAL ;load code MANUAL or AUTO after reset DEBUGPORT 2001 PROMPT 8280> ;new prompt for Telnet DUMP E:\temp\dump.bin [FLASH] CHIPTYPE I28BX8 ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16) CHIPSIZE 0x200000 ;The size of one flash chip in bytes BUSWIDTH 32 ;The width of the flash memory bus in bits (8 | 16 | 32 | 64) WORKSPACE 0x04700000 ;workspace in dual port RAM ;FILE E:\cygwin\home\bdidemo\mpc8260\u-boot.bin ;FORMAT BIN 0xFFF00000 ;ERASE 0xFFF00000 ;erase sector 28 of flash SIMM (LH28F016SCT) ;ERASE 0xFFF40000 ;erase sector 29 of flash SIMM FILE E:\temp\dump512k.bin FORMAT BIN 0xFFD00000 ERASE 0xFFD00000 ERASE 0xFFD40000 ERASE 0xFFD80000 ERASE 0xFFDC0000 ERASE 0xFFE00000 ERASE 0xFFE40000 ERASE 0xFFE80000 ERASE 0xFFEC0000 [REGS] DMM1 0x04700000 FILE E:\cygwin\home\bdidemo\mpc8260\reg8280.def