; bdiGDB configuration file for the MPC8220i Alaska board ; ------------------------------------------------------- ; [INIT] ; init core register WREG MSR 0x00001002 ;MSR : ME,RI WM32 0x80000000 0xf0000000 ;MBAR : internal registers at 0xf0000000 WSPR 311 0xf0000000 ;MBAR : save internal register base WSPR 279 0xf0000000 ;SPRG7: save internal register base ; ; init memory controller WM32 0xf0000500 0xFFF00000 ;CS0 Base Address WM32 0xf0000504 0x00070001 ;CS0 Address Mask WM32 0xf0000508 0x003F1140 ;CS0 Control Register WM32 0xf000050C 0xFE000000 ;CS1 WM32 0xf0000510 0x00FF0001 WM32 0xf0000514 0x003F1140 WM32 0xf0000518 0xF1000000 ;CS2 WM32 0xf000051c 0x00000001 WM32 0xf0000520 0x003F1140 WM32 0xf0000524 0xF2000000 ;CS3 WM32 0xf0000528 0x003F0001 WM32 0xf000052c 0x003F1100 WM32 0xf000060c 0x50000000 ;Set mux registers for chip selects ; ; init SDRAM controller WM32 0xf0000240 0x00002000 WM32 0xf0000004 0x0000022e ; SDRAM DDR DRIVE STRENGTH WM32 0xf0000108 0xc7622830 ; CONFIG REG1 WM32 0xf000010C 0x47770000 ; CONFIG REG2 WM32 0xf0000104 0xe1080000 ; Control REG - Enable DDR, CKE=1, ADDR MUX=01, set refresh interval WM32 0xf0000104 0xe1080002 ; Control REG - Same but do PRECHARGE ALL WM32 0xf0000100 0x40010000 ; DDR MODE REGISTER - BA=01 - Select Extended Mode and enable DLL DELAY 200 WM32 0xf0000100 0x048d0000 ; DDR MODE REGISTER - BA=00 ADDR = 101100011 RESET DLL / BURST=8 / CAS=2 / Burst Sequential WM32 0xf0000028 0x00000019 ; BASE ADDRESS - DUH? WM32 0xf0000104 0xe1080002 ; Control REG - PRECHARGE WM32 0xf0000104 0xe1080004 ; Control REG - SELF REFRESH WM32 0xf0000104 0xe1080004 ; Control REG - SELF REFRESH WM32 0xf0000100 0x008d0000 ; DDR MODE REGISTER - BA=00 ADDR = 1100011 DLL=normal / Burst=8 / CAS=2 / Burst Sequential WM32 0xf0000104 0x71080f00 ; Control REG - Lock Mode reg, enable auto refresh, enable DDR, Enable DQS signals ; ; define maximal transfer size TSZ4 0xFFF00000 0xFFFFFFFF ;ROM space TSZ4 0xF0000000 0xF001FFFF ;internal registers ; ; define the valid memory map MMAP 0x00000000 0x03FFFFFF ;64MB SDRAM MMAP 0xF0000000 0xF001FFFF ;Internal Registers MMAP 0xF0020000 0xF0027FFF ;Internal SRAM MMAP 0xF2004000 0xF2004800 ;2K external SRAM MMAP 0xFE000000 0xFEFFFFFF ;16MB Strata flash MMAP 0xFFF00000 0xFFF7FFFF ;512K Boot ROM space [TARGET] CPUTYPE 8220 ;the CPU type JTAGCLOCK 1 ;use 16 MHz JTAG clock WORKSPACE 0xf0020000 ;workspace for fast download ;WAKEUP 1000 ;give reset time to complete ;MEMDELAY 2000 ;additional memory access delay [HOST] IP 151.120.25.119 ;FILE E:\cygwin\home\bdidemo\mpc4200\fibo.exe FILE E:\cygwin\home\bdidemo\mpc8260\vxworks FORMAT ELF LOAD MANUAL ;load code MANUAL or AUTO after reset [FLASH] WORKSPACE 0xf0020000 ;workspace in target RAM for fast programming algorithm CHIPTYPE STRATAX8 ;Flash type is 28F128J3A CHIPSIZE 0x1000000 ;The size of one flash chip in bytes BUSWIDTH 8 ;The width of the flash memory bus in bits (8 | 16 | 32) FILE E:\cygwin\home\bdidemo\mpc8220\mpc8220.cfg FORMAT BIN 0xfe040000 ;ERASE 0xfe000000 ;erase sector 0 ;ERASE 0xfe020000 ;erase sector 1 ERASE 0xfe040000 ;erase sector 2 ERASE 0xfe060000 ;erase sector 3 ERASE 0xfe080000 ;erase sector 4 ERASE 0xfe0a0000 ;erase sector 5 ERASE 0xfe0c0000 ;erase sector 6 ERASE 0xfe0e0000 ;erase sector 7 ERASE 0xfe100000 ;erase sector 8 ERASE 0xfe120000 ;erase sector 9 ERASE 0xfe140000 ;erase sector 10 ERASE 0xfe160000 ;erase sector 11 ERASE 0xfe180000 ;erase sector 12 ERASE 0xfe1a0000 ;erase sector 13 ERASE 0xfe1c0000 ;erase sector 14 ERASE 0xfe1e0000 ;erase sector 15 [REGS] FILE $reg8220.def