;Register definition for Sandpoint 7455
;======================================
;
; name: user defined name of the register
; type: the type of the register
;	GPR	general purpose register
;	SPR	special purpose register
;	MM	memory mapped register
;	DMMx	direct memory mapped register with offset
;		x = 1..4
;		the base is defined in the configuration file
;		e.g. DMM1 0x02200000
;	IMMx	indirect memory mapped register
;		x = 1..4
;		the addr and data address is defined in the configuration file
;		e.g. IMM1 0xFEC00000 0xFEE00000
; addr:	the number, adddress or offset of the register
; size	the size of the register (8,16 or 32)
;
;name		type	addr		size
;-------------------------------------------
;
sp		GPR	1
;
xer		SPR	1
vscr		SPR	2
lr		SPR	8
ctr		SPR	9
dsisr           SPR     18
dar             SPR     19
dec             SPR     22
sdr1            SPR     25
srr0            SPR     26
srr1            SPR     27
vrsave          SPR     256
tbl             SPR     268
tbu             SPR     269
sprg0		SPR	272
sprg1		SPR	273
sprg2		SPR	274
sprg3		SPR	275
sprg4		SPR	276
sprg5		SPR	277
sprg6		SPR	278
sprg7		SPR	279
ear             SPR     282
pvr             SPR     287
;
ibat0u          SPR     528
ibat0l          SPR     529
ibat1u          SPR     530
ibat1l          SPR     531
ibat2u          SPR     532
ibat2l          SPR     533
ibat3u          SPR     534
ibat3l          SPR     535
;
dbat0u          SPR     536
dbat0l          SPR     537
dbat1u          SPR     538
dbat1l          SPR     539
dbat2u          SPR     540
dbat2l          SPR     541
dbat3u          SPR     542
dbat3l          SPR     543
;
ibat4u          SPR     560
ibat4l          SPR     561
ibat5u          SPR     562
ibat5l          SPR     563
ibat6u          SPR     564
ibat6l          SPR     565
ibat7u          SPR     566
ibat7l          SPR     567
;
dbat4u          SPR     568
dbat4l          SPR     569
dbat5u          SPR     570
dbat5l          SPR     571
dbat6u          SPR     572
dbat6l          SPR     573
dbat7u          SPR     574
dbat7l          SPR     575
;
mmcr2           SPR     944
pmc5            SPR     945
pmc6            SPR     946
bamr            SPR     951
mmcr0           SPR     952
pmc1            SPR     953
pmc2            SPR     954
siar            SPR     955
mmcr1           SPR     956
pmc3            SPR     957
pmc4            SPR     958
;
tlbmiss         SPR     980
ptehi           SPR     981
ptelo           SPR     982
l3pm            SPR     983
;
hid0            SPR     1008
hid1            SPR     1009
iabr            SPR     1010
ictrl           SPR     1011
dabr            SPR     1013
msscr0          SPR     1014
msssr0          SPR     1015
ldstcr          SPR     1016
l2cr            SPR     1017
l3cr            SPR     1018
ictc            SPR     1019
thrm1           SPR     1020
thrm2           SPR     1021
thrm3           SPR     1022
pir             SPR     1023
;
;
; IMMx must be set to the configuration registers
;
vendor		IMM1	0x00000080	16 SWAP
device		IMM3	0x00000080	16 SWAP
;
lmbar           IMM1    0x10000080      32 SWAP
;
pmcr1		IMM1	0x70000080	16 SWAP
pmcr2		IMM3	0x70000080	8
odcr		IMM4	0x70000080	8
cdcr		IMM1	0x74000080	16 SWAP
eumbbar         IMM1    0x78000080      32 SWAP
msar1           IMM1    0x80000080      32 SWAP
msar2           IMM1    0x84000080      32 SWAP
emsar1          IMM1    0x88000080      32 SWAP
emsar2          IMM1    0x8c000080      32 SWAP
mear1           IMM1    0x90000080      32 SWAP
mear2           IMM1    0x94000080      32 SWAP
emear1          IMM1    0x98000080      32 SWAP
emear2          IMM1    0x9c000080      32 SWAP
mben            IMM1    0xa0000080      8
mpm             IMM4    0xa0000080      8
;
picr1           IMM1    0xa8000080      32 SWAP
picr2           IMM1    0xac000080      32 SWAP
mccr1           IMM1    0xf0000080      32 SWAP
mccr2           IMM1    0xf4000080      32 SWAP
mccr3           IMM1    0xf8000080      32 SWAP
mccr4           IMM1    0xfc000080      32 SWAP
;
;
; DMM1 must be set to the embedded utility memory block
;
imisr           DMM1    0x00100         32 SWAP
imimr           DMM1    0x00104         32 SWAP
ifhpr           DMM1    0x00120         32 SWAP
iftpr           DMM1    0x00128         32 SWAP
iphpr           DMM1    0x00130         32 SWAP
iptpr           DMM1    0x00138         32 SWAP
ofhpr           DMM1    0x00140         32 SWAP
oftpr           DMM1    0x00148         32 SWAP
ophpr           DMM1    0x00150         32 SWAP
optpr           DMM1    0x00158         32 SWAP
mucr            DMM1    0x00164         32 SWAP
qbar            DMM1    0x00170         32 SWAP
;
dmr0            DMM1    0x01100         32 SWAP
dsr0            DMM1    0x01104         32 SWAP
cdar0           DMM1    0x01108         32 SWAP
sar0            DMM1    0x01110         32 SWAP
dar0            DMM1    0x01118         32 SWAP
bcr0            DMM1    0x01120         32 SWAP
ndar0           DMM1    0x01124         32 SWAP
dmr1            DMM1    0x01200         32 SWAP
dsr1            DMM1    0x01204         32 SWAP
cdar1           DMM1    0x01208         32 SWAP
sar1            DMM1    0x01210         32 SWAP
dar1            DMM1    0x01218         32 SWAP
bcr1            DMM1    0x01220         32 SWAP
ndar1           DMM1    0x01224         32 SWAP
;
ombar           DMM1    0x02300         32 SWAP
otwr            DMM1    0x02308         32 SWAP
itwr            DMM1    0x02310         32 SWAP
;
i2cadr          DMM1    0x03000         32 SWAP
i2cfdr          DMM1    0x03004         32 SWAP
i2ccr           DMM1    0x03008         32 SWAP
i2csr           DMM1    0x0300c         32 SWAP
i2cdr           DMM1    0x03010         32 SWAP
;
frr             DMM1    0x41000         32 SWAP
gcr             DMM1    0x41020         32 SWAP
eicr            DMM1    0x41030         32 SWAP
evi             DMM1    0x41080         32 SWAP
pi              DMM1    0x41090         32 SWAP
svr             DMM1    0x410e0         32 SWAP
tfrr            DMM1    0x410f0         32 SWAP
gtccr0          DMM1    0x41100         32 SWAP
gtbcr0          DMM1    0x41110         32 SWAP
gtvpr0          DMM1    0x41120         32 SWAP
gtdr0           DMM1    0x41130         32 SWAP
gtccr1          DMM1    0x41140         32 SWAP
gtbcr1          DMM1    0x41150         32 SWAP
gtvpr1          DMM1    0x41160         32 SWAP
gtdr1           DMM1    0x41170         32 SWAP
gtccr2          DMM1    0x41180         32 SWAP
gtbcr2          DMM1    0x41190         32 SWAP
gtvpr2          DMM1    0x411a0         32 SWAP
gtdr2           DMM1    0x411b0         32 SWAP
gtccr3          DMM1    0x411c0         32 SWAP
gtbcr3          DMM1    0x411d0         32 SWAP
gtvpr3          DMM1    0x411e0         32 SWAP
gtdr3           DMM1    0x411f0         32 SWAP
ivpr0           DMM1    0x50200         32 SWAP
idr0            DMM1    0x50210         32 SWAP
ivpr1           DMM1    0x50220         32 SWAP
idr1            DMM1    0x50230         32 SWAP
ivpr2           DMM1    0x50240         32 SWAP
idr2            DMM1    0x50250         32 SWAP
ivpr3           DMM1    0x50260         32 SWAP
idr3            DMM1    0x50270         32 SWAP
ivpr4           DMM1    0x50280         32 SWAP
idr4            DMM1    0x50290         32 SWAP
svpr0           DMM1    0x50200         32 SWAP
sdr0            DMM1    0x50210         32 SWAP
svpr1           DMM1    0x50220         32 SWAP
sdr1            DMM1    0x50230         32 SWAP
svpr2           DMM1    0x50240         32 SWAP
sdr2            DMM1    0x50250         32 SWAP
svpr3           DMM1    0x50260         32 SWAP
sdr3            DMM1    0x50270         32 SWAP
svpr4           DMM1    0x50280         32 SWAP
sdr4            DMM1    0x50290         32 SWAP
svpr5           DMM1    0x502a0         32 SWAP
sdr5            DMM1    0x502b0         32 SWAP
svpr6           DMM1    0x502c0         32 SWAP
sdr6            DMM1    0x502d0         32 SWAP
svpr7           DMM1    0x502e0         32 SWAP
sdr7            DMM1    0x502f0         32 SWAP
svpr8           DMM1    0x50300         32 SWAP
sdr8            DMM1    0x50310         32 SWAP
svpr9           DMM1    0x50320         32 SWAP
sdr9            DMM1    0x50330         32 SWAP
svpr10          DMM1    0x50340         32 SWAP
sdr10           DMM1    0x50350         32 SWAP
svpr11          DMM1    0x50360         32 SWAP
sdr11           DMM1    0x50370         32 SWAP
svpr12          DMM1    0x50380         32 SWAP
sdr12           DMM1    0x50390         32 SWAP
svpr13          DMM1    0x503a0         32 SWAP
sdr13           DMM1    0x503b0         32 SWAP
svpr14          DMM1    0x503c0         32 SWAP
sdr14           DMM1    0x503d0         32 SWAP
svpr15          DMM1    0x503e0         32 SWAP
sdr15           DMM1    0x503f0         32 SWAP
iivpr0          DMM1    0x51020         32 SWAP
iidr0           DMM1    0x51030         32 SWAP
iivpr1          DMM1    0x51040         32 SWAP
iidr1           DMM1    0x51050         32 SWAP
iivpr2          DMM1    0x51060         32 SWAP
iidr2           DMM1    0x51070         32 SWAP
iivpr3          DMM1    0x510c0         32 SWAP
iidr3           DMM1    0x510d0         32 SWAP
;
pctpr           DMM1    0x60080         32 SWAP
iack            DMM1    0x600a0         32 SWAP
eoi             DMM1    0x600b0         32 SWAP

