; bdiGDB configuration file for MPC5121E-MDS board
; ------------------------------------------------
;
;
[INIT]
; init core register
WREG    MSR             0x00001002      ;MSR  : ME,RI
;
WM32    0xff400000      0xe0000000      ;MABR to 0xe0000000
WM32    0xe00000c4      0x30000000      ;SRAMBAR to 0x30000000
;
; Enable all clocks
WM32    0xe0000f04      0xffffffff      ;SCCR1
WM32    0xe0000f08      0xffffffff      ;SCCR2
;
; Initialize CPLD chip select CS2
WM32    0xe000002C      0xe200e200      ;LPCS2AW    : Access Window 0xe2000000...0xe200ffff
WM32    0xe0010008      0x05059010      ;CS2_CONFIG :
;
; Initialize Flash chip select CS0
WM32    0xe0000024      0xFC00FFFF      ;LPCS0AW    : Access Window 0xfc000000...0xffffffff
WM32    0xe0010000      0x05059310      ;CS0_CONFIG :
WM32    0xe0010020      0x01000000      ;CS_CONTROL : BCSR
;
; Enable Boot Flash writes in CPLD register
WM8     0xe2000008      0xD1            ;enable write to Boot Flash (WP# high)
;
; Setup DDR2 DRAM
WM32    0xe000a000      0x00000036      ;IO_CONTROL_MEM: Setup DDR pads for DDR2 mode
WM32    0xe00000a0      0x00000000      ;DDRLAWBAR0: Set DRAM address to 0x00000000
WM32    0xe00000a4      0x0000001a      ;DDRLAWAR0: Set the DRAM size to 256 MB
WM32    0xe0009000      0x30000000      ;Enable DRAM Module
;
WM32    0xe0009080      0x000777aa      ;Setup DRAM Controller Priority Manager
WM32    0xe0009084      0x00000055
WM32    0xe0009088      0x00000000
WM32    0xe000908c      0x11111117
WM32    0xe00090a0      0x7777777a
WM32    0xe0009090      0x444eeeee
WM32    0xe00090a4      0xeeeeeeee
WM32    0xe0009094      0x44444444
WM32    0xe00090a8      0x44444444
WM32    0xe0009098      0x55555555
WM32    0xe00090ac      0x55555558
WM32    0xe000909c      0x11111111
WM32    0xe00090b0      0x1111117c
WM32    0xe00090b4      0x33333377
WM32    0xe00090c8      0x7777eeee
WM32    0xe00090b8      0x11111111
WM32    0xe00090cc      0x11111111
WM32    0xe00090bc      0x11111111
WM32    0xe00090d0      0x11111111
WM32    0xe00090c0      0x11111111
WM32    0xe00090d4      0x11111111
WM32    0xe00090c4      0x11111111
WM32    0xe00090d8      0x11111111
;
WM32    0xe0009000      0xf8604200      ;DDR_SYS_CONFIG
WM32    0xe0009004      0x0000281e      ;DDR_TIME_CONFIG0
WM32    0xe0009008      0x68ec1168      ;DDR_TIME_CONFIG1
WM32    0xe000900c      0x37a10864      ;DDR_TIME_CONFIG2
;
WM32    0xe0009010      0x01380000      ;10x NOP
WM32    0xe0009010      0x01380000
WM32    0xe0009010      0x01380000
WM32    0xe0009010      0x01380000
WM32    0xe0009010      0x01380000
WM32    0xe0009010      0x01380000
WM32    0xe0009010      0x01380000
WM32    0xe0009010      0x01380000
WM32    0xe0009010      0x01380000
WM32    0xe0009010      0x01380000
;
WM32    0xe0009010      0x01100400      ;PRECHARGE_ALL
WM32    0xe0009010      0x01020000      ;Set EMR2
WM32    0xe0009010      0x01030000      ;Set EMR3
WM32    0xe0009010      0x01010000      ;Enable DLL
WM32    0xe0009010      0x01000932      ;Reset DLL
WM32    0xe0009010      0x01100400      ;PRECHARGE_ALL
WM32    0xe0009010      0x01080000      ;2x REFRESH
WM32    0xe0009010      0x01080000
WM32    0xe0009010      0x01000832      ;Initialize device operation
WM32    0xe0009010      0x01010780      ;Enable OCD default
WM32    0xe0009010      0x01010400      ;Enable OCD exit
;
WM32    0xe0009010      0x01380000      ;10x NOP
WM32    0xe0009010      0x01380000
WM32    0xe0009010      0x01380000
WM32    0xe0009010      0x01380000
WM32    0xe0009010      0x01380000
WM32    0xe0009010      0x01380000
WM32    0xe0009010      0x01380000
WM32    0xe0009010      0x01380000
WM32    0xe0009010      0x01380000
WM32    0xe0009010      0x01380000
;
WM32    0xe0009004      0x01f4281e      ;Start MDDRC
WM32    0xe0009000      0xe8604200      ;This accounts for no pad and no board delay.
                                        ;Maybe you have to program some margin if you
                                        ;face troubles with reads. I would suggest
                                        ;trying 0xe8604a00 or even 0xe8605200.
DELAY   100
;


[TARGET]
CPUTYPE     5121                        ;the CPU type
JTAGCLOCK   1                           ;use 16 MHz JTAG clock
POWERUP     2000                        ;start delay after power-up detected in ms
WAKEUP      500                         ;give reset time to complete
STARTUP     RESET                       ;halt immediately at the boot vector
;RCW         0xc0000b00 0x03040400       ;override reset configuration words
;BOOTADDR    0x00000100                  ;boot address used for start-up break
BOOTADDR    0xfff00100                  ;boot address used for start-up break
BREAKMODE   SOFT      	                ;SOFT or HARD, HARD uses PPC hardware breakpoint
STEPMODE    HWBP                        ;TRACE or HWBP, HWBP uses a hardware breakpoint


[HOST]
IP          151.120.25.119
FILE        E:\cygwin\home\demo\mpc860\fibo.elf
FORMAT      ELF
;FILE        E:\temp\dump512k.bin
;FORMAT      BIN 0x10000
PROMPT      5121>


[FLASH]
CHIPTYPE    MIRRORX16   ;S29GL256N
CHIPSIZE    0x02000000  ;32MByte for one S29GL256N
BUSWIDTH    32          ;two S29GL256N used for 32-bit
WORKSPACE   0x30000000  ;workspace in internal SRAM
FILE        E:\temp\dump256k.bin
FORMAT      BIN 0xff000000
ERASE       0xff000000 0x40000 3 ; erase 3 sectors


[REGS]
FILE        $reg5121e.def