; bdiGDB configuration file for XLS408 board ; ------------------------------------------ ; ; [INIT] ; [TARGET] ; common parameters POWERUP 2000 ;power-up delay 2 seconds JTAGCLOCK 1 ;use 16 MHz JTAG clock JTAGDELAY 2 ;delay for 16 TCK's WAKEUP 100 ;give reset time to complete RESET HARD ;reset via EJTAG reset pin ;RESET JTAG ;reset via EJTAG instruction ; ;====================================================== ; !!!! defines the cores numbers without any holes !!!! ;====================================================== ; ; Core#0 parameters (active vCPU after reset) #0 CPUTYPE XLS 0 ;CPU type, CHIP0/CPU0/THREAD0 #0 ENDIAN BIG ;target is big endian #0 STARTUP RUN ;let vCPU run ; ; Core#1 parameters #1 CPUTYPE XLS 1 ;CPU type, CHIP0/CPU0/THREAD1 #1 ENDIAN BIG ;target is big endian #1 STARTUP RUN ;let vCPU run ; ; Core#2 parameters #2 CPUTYPE XLS 2 ;CPU type, CHIP0/CPU0/THREAD2 #2 ENDIAN BIG ;target is big endian #2 STARTUP RUN ;let vCPU run ; ; Core#3 parameters #3 CPUTYPE XLS 3 ;CPU type, CHIP0/CPU0/THREAD3 #3 ENDIAN BIG ;target is big endian #3 STARTUP RUN ;let vCPU run ; ; Core#4 parameters #4 CPUTYPE XLS 4 ;CPU type, CHIP0/CPU1/THREAD0 #4 ENDIAN BIG ;target is big endian #4 STARTUP RUN ;let vCPU run ; ; Core#5 parameters #5 CPUTYPE XLS 5 ;CPU type, CHIP0/CPU1/THREAD1 #5 ENDIAN BIG ;target is big endian #5 STARTUP RUN ;let vCPU run ; ; Core#6 parameters #6 CPUTYPE XLS 6 ;CPU type, CHIP0/CPU1/THREAD2 #6 ENDIAN BIG ;target is big endian #6 STARTUP RUN ;let vCPU run ; ; Core#7 parameters #7 CPUTYPE XLS 7 ;CPU type, CHIP0/CPU1/THREAD3 #7 ENDIAN BIG ;target is big endian #7 STARTUP RUN ;let vCPU run ; [HOST] IP 151.120.25.119 #0 PROMPT vCPU#0> #1 PROMPT vCPU#1> #2 PROMPT vCPU#2> #3 PROMPT vCPU#3> #4 PROMPT vCPU#4> #5 PROMPT vCPU#5> #6 PROMPT vCPU#6> #7 PROMPT vCPU#7> ; [FLASH] [REGS] ;used for all cores unless overridden DMM1 0xBEF00000 ;Peripheral and I/O Configuration base FILE $regXLS.def