; bdiGDB configuration file for XLS408 board
; ------------------------------------------
;
; !!! Important Note !!!:
; Download and flash programming with a WORKSPACE works only if
; only one vCPU is in debug mode and accesses EJTAG memory.
; This because the BDI simply reads/writes data without any synchroniation.
; It assumes that the helper code running on the vCPU is fast enougth
; to provide/consume the data.
;
;
[INIT]
;


[TARGET]
; common parameters
POWERUP     2000                ;power-up delay 2 seconds
JTAGCLOCK   1                   ;use 16 MHz JTAG clock
JTAGDELAY   2                   ;delay for 16 TCK's
WAKEUP      100                 ;give reset time to complete
RESET       HARD                ;reset via EJTAG reset pin
;RESET       JTAG                ;reset via EJTAG instruction
;
;======================================================
; !!!! defines the cores numbers without any holes !!!!
;======================================================
;
; Core#0 parameters (active vCPU after reset)
#0 CPUTYPE     XLS 0            ;CPU type, CHIP0/CPU0/THREAD0
#0 ENDIAN      BIG              ;target is big endian
;#0 ENDIAN      LITTLE           ;target is little endian
#0 STARTUP     HALT             ;halt at the reset vector
;#0 STARTUP     STOP 30000       ;let ROM setup the system
;#0 STARTUP     RUN              ;let vCPU run
;#0 WORKSPACE   0xA0000080       ;workspace in target RAM for fast download
;
; Core#1 parameters
;#1 CPUTYPE     XLS 1            ;CPU type, CHIP0/CPU0/THREAD1
;#1 ENDIAN      BIG              ;target is big endian
;#1 STARTUP     RUN             ;let vCPU run
;
; Core#2 parameters
;#2 CPUTYPE     XLS 2            ;CPU type, CHIP0/CPU0/THREAD2
;#2 ENDIAN      BIG              ;target is big endian
;#2 STARTUP     RUN             ;let vCPU run
;
; Core#3 parameters
;#3 CPUTYPE     XLS 3            ;CPU type, CHIP0/CPU0/THREAD3
;#3 ENDIAN      BIG              ;target is big endian
;#3 STARTUP     RUN              ;let vCPU run
;
; Core#4 parameters
;#4 CPUTYPE     XLS 4            ;CPU type, CHIP0/CPU1/THREAD0
;#4 ENDIAN      BIG              ;target is big endian
;#4 STARTUP     RUN              ;let vCPU run
;
; Core#5 parameters
;#5 CPUTYPE     XLS 5            ;CPU type, CHIP0/CPU1/THREAD1
;#5 ENDIAN      BIG              ;target is big endian
;#5 STARTUP     RUN              ;let vCPU run
;
; Core#6 parameters
;#6 CPUTYPE     XLS 6            ;CPU type, CHIP0/CPU1/THREAD2
;#6 ENDIAN      BIG              ;target is big endian
;#6 STARTUP     RUN              ;let vCPU run
;
; Core#7 parameters
;#7 CPUTYPE     XLS 7            ;CPU type, CHIP0/CPU1/THREAD3
;#7 ENDIAN      BIG              ;target is big endian
;#7 STARTUP     RUN              ;let vCPU run
;


[HOST]
IP             151.120.25.112

#0 PROMPT      vCPU#0>
#0 FILE        E:/temp/dump256k.bin
#0 FORMAT      BIN 0xA0200000
;
#1 PROMPT      vCPU#1>
#2 PROMPT      vCPU#2>
#3 PROMPT      vCPU#3>
#4 PROMPT      vCPU#4>
#5 PROMPT      vCPU#5>
#6 PROMPT      vCPU#6>
#7 PROMPT      vCPU#7>
;

[FLASH]
;WORKSPACE   0xA0001000          ;workspace in SDRAM
CHIPTYPE    STRATAX16           ;Intel 28F128J3
CHIPSIZE    0x01000000          ;16Mbyte
BUSWIDTH    16 SWAP             ;The width of the flash memory bus in bits
FILE        E:\temp\dump16k.bin
FORMAT      BIN 0xBFE00000
ERASE       0xBFE00000


[REGS]
;used for all cores unless overridden
DMM1	0xBEF00000      ;Peripheral and I/O Configuration base
FILE	$regXLS.def