; bdiGDB configuration file for Netlogic XLP832 EVB2-B1
; -----------------------------------------------------
;
; The XLP processor needs a reset time between 4 - 8 ms.
; This time can be tuned via the RESET parameter and SCANINIT sequences.
; The total reset time depends on how many cores needs an EJTAGBOOT scan.
; Use a logic analyzer or oscilloscope to measure and optimize the reset time.
; This configuration assertes reset for 4.2 ms (BDI3000 firmware version 1.09).
;
;
[INIT]
;
WCP0    12                      0x704000e4  ;enable CPx and access to 64-bit segments
;
; Setup TLB (for test purpose only)
WTLB    0xC000000c_0x10000500   0x01FC0017  ;Boot Flash 2 x  1MB, uncached DVG
WTLB    0x40000004_0x20000500   0x01FC0017  ;Boot Flash 2 x  1MB, uncached DVG
WTLB    0x00000005_0x30000500   0x01FC0017  ;Boot Flash 2 x  1MB, uncached DVG
;



[TARGET]
; common parameters
POWERUP     5000                ;power-up delay 5 seconds
JTAGCLOCK   3                   ;use 8 MHz JTAG clock
RESET       HARD 2              ;assert RESET for 2 ms
WAKEUP      100                 ;give reset time to complete
;
;
; Enable EJTAG via Main TAP register
SCANINIT    t1:w1000:t0:w100:   ;toggle TRST
SCANINIT    ch10:w100:          ;clock TCK with TMS high and wait
SCANINIT    i16=00e0:d1=01      ;enable EJTAG
;
;
;========================================================
; !!!! define the cores ID's (#nn) without any holes !!!!
;========================================================
;
;------------------------------------------------------------------------------
;
; vCPU#0.0 parameters (active core after reset)
#0 CPUTYPE     XLP              ;the used target CPU type
#0 ENDIAN      BIG              ;target is big endian
#0 JTAGDELAY   2                ;16 TCK's access delay
#0 STARTUP     HALT             ;halt at the reset vector
#0 SCANPRED    1   16           ;Chip TAP               (IR = 16 +  0x5 =  16)
#0 SCANSUCC    31  155          ;31 vCPU TAP's          (IR =      31x5 = 155)
;
; vCPU#0.1 parameters
#1 CPUTYPE     XLP              ;the used target CPU type
#1 ENDIAN      BIG              ;target is big endian
#1 JTAGDELAY   2                ;16 TCK's access delay
#1 STARTUP     WAIT             ;halt once release from reset
#1 SCANPRED    2   21           ;Chip TAP, 1 vCPU TAP   (IR = 16 +  1x5 =  21)
#1 SCANSUCC    30  150          ;30 vCPU TAP's          (IR =      30x5 = 150)
;
; vCPU#0.2 parameters
#2 CPUTYPE     XLP              ;the used target CPU type
#2 ENDIAN      BIG              ;target is big endian
#2 JTAGDELAY   2                ;16 TCK's access delay
#2 STARTUP     WAIT             ;halt once release from reset
#2 SCANPRED    3   26           ;Chip TAP, 2 vCPU TAP   (IR = 16 +  2x5 =  26)
#2 SCANSUCC    29  145          ;29 vCPU TAP's          (IR =      29x5 = 145)
;
; vCPU#0.3 parameters
#3 CPUTYPE     XLP              ;the used target CPU type
#3 ENDIAN      BIG              ;target is big endian
#3 JTAGDELAY   2                ;16 TCK's access delay
#3 STARTUP     WAIT             ;halt once release from reset
#3 SCANPRED    4   31           ;Chip TAP, 3 vCPU TAP   (IR = 16 +  3x5 =  31)
#3 SCANSUCC    28  140          ;28 vCPU TAP's          (IR =      28x5 = 140)
;
;------------------------------------------------------------------------------
;
; vCPU#1.0 parameters
#4 CPUTYPE     XLP              ;the used target CPU type
#4 ENDIAN      BIG              ;target is big endian
#4 JTAGDELAY   2                ;16 TCK's access delay
#4 STARTUP     WAIT             ;halt once release from reset
#4 SCANPRED    5   36           ;Chip TAP, 4 vCPU TAP   (IR = 16 +  4x5 =  36)
#4 SCANSUCC    27  135          ;27 vCPU TAP's          (IR =      27x5 = 135)
;
; vCPU#1.1 parameters
#5 CPUTYPE     XLP              ;the used target CPU type
#5 ENDIAN      BIG              ;target is big endian
#5 JTAGDELAY   2                ;16 TCK's access delay
#5 STARTUP     WAIT             ;halt once release from reset
#5 SCANPRED    6   41           ;Chip TAP, 5 vCPU TAP   (IR = 16 +  5x5 =  41)
#5 SCANSUCC    26  130          ;26 vCPU TAP's          (IR =      26x5 = 130)
;
; vCPU#1.2 parameters
#6 CPUTYPE     XLP              ;the used target CPU type
#6 ENDIAN      BIG              ;target is big endian
#6 JTAGDELAY   2                ;16 TCK's access delay
#6 STARTUP     WAIT             ;halt once release from reset
#6 SCANPRED    7   46           ;Chip TAP, 6 vCPU TAP   (IR = 16 +  6x5 =  46)
#6 SCANSUCC    25  125          ;25 vCPU TAP's          (IR =      25x5 = 125)
;
; vCPU#1.3 parameters
#7 CPUTYPE     XLP              ;the used target CPU type
#7 ENDIAN      BIG              ;target is big endian
#7 JTAGDELAY   2                ;16 TCK's access delay
#7 STARTUP     WAIT             ;halt once release from reset
#7 SCANPRED    8   51           ;Chip TAP, 7 vCPU TAP   (IR = 16 +  7x5 =  51)
#7 SCANSUCC    24  120          ;24 vCPU TAP's          (IR =      24x5 = 120)
;
;------------------------------------------------------------------------------
;
; vCPU#2.0 parameters
#8 CPUTYPE     XLP              ;the used target CPU type
#8 ENDIAN      BIG              ;target is big endian
#8 JTAGDELAY   2                ;16 TCK's access delay
#8 STARTUP     WAIT             ;halt once release from reset
#8 SCANPRED    9   56
#8 SCANSUCC    23  115
;
; vCPU#2.1 parameters
#9 CPUTYPE     XLP              ;the used target CPU type
#9 ENDIAN      BIG              ;target is big endian
#9 JTAGDELAY   2                ;16 TCK's access delay
#9 STARTUP     WAIT             ;halt once release from reset
#9 SCANPRED    10  61
#9 SCANSUCC    22  110
;
; vCPU#2.2 parameters
#10 CPUTYPE     XLP              ;the used target CPU type
#10 ENDIAN      BIG              ;target is big endian
#10 JTAGDELAY   2                ;16 TCK's access delay
#10 STARTUP     WAIT             ;halt once release from reset
#10 SCANPRED    11  66
#10 SCANSUCC    21  105
;
; vCPU#2.3 parameters
#11 CPUTYPE     XLP              ;the used target CPU type
#11 ENDIAN      BIG              ;target is big endian
#11 JTAGDELAY   2                ;16 TCK's access delay
#11 STARTUP     WAIT             ;halt once release from reset
#11 SCANPRED    12  71
#11 SCANSUCC    20  100
;
;------------------------------------------------------------------------------
;
; vCPU#3.0 parameters
#12 CPUTYPE     XLP              ;the used target CPU type
#12 ENDIAN      BIG              ;target is big endian
#12 JTAGDELAY   2                ;16 TCK's access delay
#12 STARTUP     WAIT             ;halt once release from reset
#12 SCANPRED    13  76
#12 SCANSUCC    19  95
;
; vCPU#3.1 parameters
#13 CPUTYPE     XLP              ;the used target CPU type
#13 ENDIAN      BIG              ;target is big endian
#13 JTAGDELAY   2                ;16 TCK's access delay
#13 STARTUP     WAIT             ;halt once release from reset
#13 SCANPRED    14  81
#13 SCANSUCC    18  90
;
; vCPU#3.2 parameters
#14 CPUTYPE     XLP              ;the used target CPU type
#14 ENDIAN      BIG              ;target is big endian
#14 JTAGDELAY   2                ;16 TCK's access delay
#14 STARTUP     WAIT             ;halt once release from reset
#14 SCANPRED    15  86
#14 SCANSUCC    17  85
;
; vCPU#3.3 parameters
#15 CPUTYPE     XLP              ;the used target CPU type
#15 ENDIAN      BIG              ;target is big endian
#15 JTAGDELAY   2                ;16 TCK's access delay
#15 STARTUP     WAIT             ;halt once release from reset
#15 SCANPRED    16  91
#15 SCANSUCC    16  80
;
;------------------------------------------------------------------------------
;
; vCPU#4.0 parameters
#16 CPUTYPE     XLP              ;the used target CPU type
#16 ENDIAN      BIG              ;target is big endian
#16 JTAGDELAY   2                ;16 TCK's access delay
#16 STARTUP     WAIT             ;halt once release from reset
#16 SCANPRED    17  96
#16 SCANSUCC    15  75
;
; vCPU#4.1 parameters
#17 CPUTYPE     XLP              ;the used target CPU type
#17 ENDIAN      BIG              ;target is big endian
#17 JTAGDELAY   2                ;16 TCK's access delay
#17 STARTUP     WAIT             ;halt once release from reset
#17 SCANPRED    18  101
#17 SCANSUCC    14  70
;
; vCPU#4.2 parameters
#18 CPUTYPE     XLP              ;the used target CPU type
#18 ENDIAN      BIG              ;target is big endian
#18 JTAGDELAY   2                ;16 TCK's access delay
#18 STARTUP     WAIT             ;halt once release from reset
#18 SCANPRED    19  106
#18 SCANSUCC    13  65
;
; vCPU#4.3 parameters
#19 CPUTYPE     XLP              ;the used target CPU type
#19 ENDIAN      BIG              ;target is big endian
#19 JTAGDELAY   2                ;16 TCK's access delay
#19 STARTUP     WAIT             ;halt once release from reset
#19 SCANPRED    20  111
#19 SCANSUCC    12  60
;
;------------------------------------------------------------------------------
;
; vCPU#5.0 parameters
#20 CPUTYPE     XLP              ;the used target CPU type
#20 ENDIAN      BIG              ;target is big endian
#20 JTAGDELAY   2                ;16 TCK's access delay
#20 STARTUP     WAIT             ;halt once release from reset
#20 SCANPRED    21  116
#20 SCANSUCC    11  55
;
; vCPU#5.1 parameters
#21 CPUTYPE     XLP              ;the used target CPU type
#21 ENDIAN      BIG              ;target is big endian
#21 JTAGDELAY   2                ;16 TCK's access delay
#21 STARTUP     WAIT             ;halt once release from reset
#21 SCANPRED    22  121
#21 SCANSUCC    10  50
;
; vCPU#5.2 parameters
#22 CPUTYPE     XLP              ;the used target CPU type
#22 ENDIAN      BIG              ;target is big endian
#22 JTAGDELAY   2                ;16 TCK's access delay
#22 STARTUP     WAIT             ;halt once release from reset
#22 SCANPRED    23  126
#22 SCANSUCC    9   45
;
; vCPU#5.3 parameters
#23 CPUTYPE     XLP              ;the used target CPU type
#23 ENDIAN      BIG              ;target is big endian
#23 JTAGDELAY   2                ;16 TCK's access delay
#23 STARTUP     WAIT             ;halt once release from reset
#23 SCANPRED    24  131
#23 SCANSUCC    8   40
;
;------------------------------------------------------------------------------
;
; vCPU#6.0 parameters
#24 CPUTYPE     XLP              ;the used target CPU type
#24 ENDIAN      BIG              ;target is big endian
#24 JTAGDELAY   2                ;16 TCK's access delay
#24 STARTUP     WAIT             ;halt once release from reset
#24 SCANPRED    25  136
#24 SCANSUCC    7   35
;
; vCPU#6.1 parameters
#25 CPUTYPE     XLP              ;the used target CPU type
#25 ENDIAN      BIG              ;target is big endian
#25 JTAGDELAY   2                ;16 TCK's access delay
#25 STARTUP     WAIT             ;halt once release from reset
#25 SCANPRED    26  141
#25 SCANSUCC    6   30
;
; vCPU#6.2 parameters
#26 CPUTYPE     XLP              ;the used target CPU type
#26 ENDIAN      BIG              ;target is big endian
#26 JTAGDELAY   2                ;16 TCK's access delay
#26 STARTUP     WAIT             ;halt once release from reset
#26 SCANPRED    27  146
#26 SCANSUCC    5   25
;
; vCPU#6.3 parameters
#27 CPUTYPE     XLP              ;the used target CPU type
#27 ENDIAN      BIG              ;target is big endian
#27 JTAGDELAY   2                ;16 TCK's access delay
#27 STARTUP     WAIT             ;halt once release from reset
#27 SCANPRED    28  151
#27 SCANSUCC    4   20
;
;------------------------------------------------------------------------------
;
; vCPU#7.0 parameters
#28 CPUTYPE     XLP              ;the used target CPU type
#28 ENDIAN      BIG              ;target is big endian
#28 JTAGDELAY   2                ;16 TCK's access delay
#28 STARTUP     WAIT             ;halt once release from reset
#28 SCANPRED    29  156
#28 SCANSUCC    3   15
;
; vCPU#7.1 parameters
#29 CPUTYPE     XLP              ;the used target CPU type
#29 ENDIAN      BIG              ;target is big endian
#29 JTAGDELAY   2                ;16 TCK's access delay
#29 STARTUP     WAIT             ;halt once release from reset
#29 SCANPRED    30  161
#29 SCANSUCC    2   10
;
; vCPU#7.2 parameters
#30 CPUTYPE     XLP              ;the used target CPU type
#30 ENDIAN      BIG              ;target is big endian
#30 JTAGDELAY   2                ;16 TCK's access delay
#30 STARTUP     WAIT             ;halt once release from reset
#30 SCANPRED    31  166
#30 SCANSUCC    1   5
;
; vCPU#7.3 parameters
#31 CPUTYPE     XLP              ;the used target CPU type
#31 ENDIAN      BIG              ;target is big endian
#31 JTAGDELAY   2                ;16 TCK's access delay
#31 STARTUP     WAIT             ;halt once release from reset
#31 SCANPRED    32  171
#31 SCANSUCC    0   0
;
;======================================================


[HOST]
FILE		e:/temp/dump256k.bin
FORMAT		BIN 0xa0010000

#0  PROMPT      vCPU#0.0>
#1  PROMPT      vCPU#0.1>
#2  PROMPT      vCPU#0.2>
#3  PROMPT      vCPU#0.3>
#4  PROMPT      vCPU#1.0>
#5  PROMPT      vCPU#1.1>
#6  PROMPT      vCPU#1.2>
#7  PROMPT      vCPU#1.3>
#8  PROMPT      vCPU#2.0>
#9  PROMPT      vCPU#2.1>
#10 PROMPT      vCPU#2.2>
#11 PROMPT      vCPU#2.3>
#12 PROMPT      vCPU#3.0>
#13 PROMPT      vCPU#3.1>
#14 PROMPT      vCPU#3.2>
#15 PROMPT      vCPU#3.3>
;
#16 PROMPT      vCPU#4.0>
#17 PROMPT      vCPU#4.1>
#18 PROMPT      vCPU#4.2>
#19 PROMPT      vCPU#4.3>
#20 PROMPT      vCPU#5.0>
#21 PROMPT      vCPU#5.1>
#22 PROMPT      vCPU#5.2>
#23 PROMPT      vCPU#5.3>
#24 PROMPT      vCPU#6.0>
#25 PROMPT      vCPU#6.1>
#26 PROMPT      vCPU#6.2>
#27 PROMPT      vCPU#6.3>
#28 PROMPT      vCPU#7.0>
#29 PROMPT      vCPU#7.1>
#30 PROMPT      vCPU#7.2>
#31 PROMPT      vCPU#7.3>



[FLASH]


[REGS]
;used for all cores unless overridden
;DMM1	0x18000000              ;PCIe Configuration Base
;DMM1	0xB8000000              ;PCIe Configuration Base (kseg1)
DMM1	0x9000000018000000      ;PCIe Configuration Base (xkphys)
FILE	$regXLP.def