; bdiGDB flash programming via xkphys on a Cavium CN7000
; ------------------------------------------------------
;
; Note:
; On the CN7000-EVB make sure that switch SW4.7 is in the OFF position.
; Otherwise the on-board USB-EJTAG interface is selected.
;
;
[INIT]
;
#0 WREG status              0x504000e4          ;enable access to 64-bit segment
#0 WREG boot_reg_cfg0       0x00000000afff1f00  ;MIO_BOOT_REG_CFG0: map to 0x1f000000
;

[TARGET]
; common parameters
POWERUP     2000                ;power-up delay 5 seconds
JTAGCLOCK   16000000            ;use 16 MHz JTAG clock
RESET       HARD                ;hard reset via RST pin
;
;======================================================
; !!!! defines the cores numbers without any holes !!!!
;======================================================
;
; Core#0 parameters (active core after reset)
#0 CPUTYPE    CNMIPS3
#0 ENDIAN     BIG
#0 JTAGDELAY  20		;needed for flash programming
#0 STARTUP    HALT              ;halt at the boot vector
#0 BREAKMODE  HARD
#0 WORKSPACE  0x80000000        ;workspace in L2 cache
#0 SCANPRED   3    15           ;select last core in scan chain
#0 SCANSUCC   0    0
;


[HOST]
FILE        E:/temp/dump256k.bin
FORMAT      BIN 0xA0001000
PROMPT      cnMIPS3#0>


[FLASH]
;Program boot flash S29GL064N-01 in 8-bit mode
WORKSPACE   0x80001000          ;workspace in L2 cache
CHIPTYPE    MIRRORX8            ;Flash type
CHIPSIZE    0x00800000          ;The visible size of one flash chip in bytes
BUSWIDTH    8                   ;The width of the flash memory bus in bits
FILE        e:/temp/dump64k.bin
FORMAT      BIN 0x800100001f600000
ERASE       0x800100001f600000


[REGS]
;used for all cores unless overridden
DMM1	0xFF300000              ;DSU base address
DMM2	0x80000000_0            ;xkphys segment
FILE	$regCNMIPS3.def