; bdiGDB configuration file for MIPS Malta 5Kc board
; --------------------------------------------------
;
; This configuration uses the YAMON monitor setup the board
;
[INIT]
;
;WM32    0xBF000700  0x000000C7  ;Enable write to system flash
;
; Setup TLB
;WTLB    0x00000600              0x01E00017  ;Monitor Flash 2 x 4MB, uncached DVG
;WTLB    0xC000000c_0x10000600   0x01E00017  ;Monitor Flash 2 x 4MB, uncached DVG
;WTLB    0x40000004_0x20000600   0x01E00017  ;Monitor Flash 2 x 4MB, uncached DVG
;WTLB    0x00000005_0x30000600   0x01E00017  ;Monitor Flash 2 x 4MB, uncached DVG
;
; Invalidate Caches
;IVIC                            ;Invalidate IC
;IVDC                            ;Invalidate DC


[TARGET]
;CPUTYPE     M5KC		;the used target CPU type
CPUTYPE     M5KC 32BIT 		;the used target CPU type
JTAGCLOCK   1                   ;use 16 MHz JTAG clock
SCANPRED    0 0                 ;JTAG devices connected before this core
SCANSUCC    0 0                 ;JTAG devices connected after this core
;ENDIAN      LITTLE              ;target is little endian
ENDIAN      BIG                 ;target is big endian
STARTUP     STOP 4000           ;STOP mode is used to let the monitor init the system
WORKSPACE   0xA0000080	        ;workspace in target RAM for fast download
BREAKMODE   SOFT        	;SOFT or HARD, HARD uses PPC hardware breakpoints
STEPMODE    JTAG                ;JTAG, HWBP or SWBP
VECTOR      CATCH               ;catch unhandled exceptions
;REGLIST     STD CP0


[HOST]
IP          151.120.25.119
FILE        E:\cygwin\home\demo\mips64\fibo.x
FORMAT      ELF
;FILE        E:\cygwin\home\bdidemo\mips\vmlinus.mips
;FORMAT      BIN 0xA0200000
;FILE        E:\temp\malta_mon.bin
;FORMAT      BIN 0xA0400000
LOAD        MANUAL      ;load code MANUAL or AUTO after reset


[FLASH]
WORKSPACE   0xa0000800  ;workspace in target RAM for fast programming algorithm
CHIPTYPE    I28BX16     ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16)
CHIPSIZE    0x200000    ;The size of one flash chip in bytes (e.g. AM29F040 = 0x80000)
BUSWIDTH    32          ;The width of the flash memory bus in bits (8 | 16 | 32 | 64)
FILE        E:\cygwin\home\bdidemo\mips64\malta_mon.cfg
FORMAT      BIN 0xbfe00000
;FILE        E:\cygwin\home\bdidemo\mips64\yamon_02_04_off.bin
;FORMAT      BIN 0xbfc00018  ; *** skip REVISION at 0xbfc00010 ***
;ERASE       0xbfc00000  ;erase sector 0
;ERASE       0xbfc20000  ;erase sector 1
;ERASE       0xbfc40000  ;erase sector 2
;ERASE       0xbfc60000  ;erase sector 3
;ERASE       0xbfc80000  ;erase sector 4
;ERASE       0xbfca0000  ;erase sector 5
;ERASE       0xbfcc0000  ;erase sector 6
;ERASE       0xbfce0000  ;erase sector 7
;ERASE       0xbfd00000  ;erase sector 8
;ERASE       0xbfd20000  ;erase sector 9
;ERASE       0xbfd40000  ;erase sector 10
;ERASE       0xbfd60000  ;erase sector 11
;ERASE       0xbfd80000  ;erase sector 12
;ERASE       0xbfda0000  ;erase sector 13
;ERASE       0xbfdc0000  ;erase sector 14
;ERASE       0xbfde0000  ;erase sector 15
ERASE       0xbfe00000  ;erase sector 16
;ERASE       0xbfe20000  ;erase sector 17
;ERASE       0xbfe40000  ;erase sector 18
;ERASE       0xbfe60000  ;erase sector 19
;ERASE       0xbfe80000  ;erase sector 20
;ERASE       0xbfea0000  ;erase sector 21
;ERASE       0xbfec0000  ;erase sector 22
;ERASE       0xbfee0000  ;erase sector 23
;ERASE       0xbff00000  ;erase sector 24
;ERASE       0xbff20000  ;erase sector 25
;ERASE       0xbff40000  ;erase sector 26
;ERASE       0xbff60000  ;erase sector 27
;ERASE       0xbff80000  ;erase sector 28
;ERASE       0xbffa0000  ;erase sector 29
;ERASE       0xbffc0000  ;erase sector 30
;ERASE       0xbffe0000  ;erase sector 31

[REGS]
DMM1	0xFF300000      ;DSU base address
DMM2	0xBF000000      ;Memory mapped registers
FILE	E:\cygwin\home\bdidemo\mips64\reg5kc.def