; bdiGDB configuration file for the Embedded Planet EP6300A board
; ---------------------------------------------------------------
;
; This configuration allows to program only 4M byte flash
; in the range 0xbfc00000 ... 0xbfffffff.
; After reset the boot flash is mapped to 0xbfc00000.
;
;
[INIT]
;
WCP0    12                      0x504000e4  ;enable access to 64-bit segment
;

[TARGET]
; common parameters
POWERUP     5000                ;power-up delay 5 seconds
JTAGCLOCK   16000000            ;use 16 MHz JTAG clock
RESET       HARD                ;hard reset via RST pin
;
;======================================================
; !!!! defines the cores numbers without any holes !!!!
;======================================================
;
; Core#0 parameters (active core after reset)
#0 CPUTYPE    CNMIPS2
#0 ENDIAN     BIG
#0 JTAGDELAY  10
#0 STARTUP    HALT    ;halt at the boot vector
#0 BREAKMODE  HARD
#0 SCANPRED   5   25  ;select last core in scan chain
#0 SCANSUCC   0    0
;
; Core#1 parameters
#1 CPUTYPE    CNMIPS2
#1 ENDIAN     BIG
#1 JTAGDELAY  10
#1 STARTUP    WAIT    ;CPU is held in reset
#1 BREAKMODE  HARD
#1 SCANPRED   4   20
#1 SCANSUCC   1    5
;
; Core#2 parameters
#2 CPUTYPE    CNMIPS2
#2 ENDIAN     BIG
#2 JTAGDELAY  10
#2 STARTUP    WAIT    ;CPU is held in reset
#2 BREAKMODE  HARD
#2 SCANPRED   3   15
#2 SCANSUCC   2   10
;
; Core#3 parameters
#3 CPUTYPE    CNMIPS2
#3 ENDIAN     BIG
#3 JTAGDELAY  10
#3 STARTUP    WAIT    ;CPU is held in reset
#3 BREAKMODE  HARD
#3 SCANPRED   2   10
#3 SCANSUCC   3   15
;
; Core#4 parameters
#4 CPUTYPE    CNMIPS2
#4 ENDIAN     BIG
#4 JTAGDELAY  10
#4 STARTUP    WAIT    ;CPU is held in reset
#4 BREAKMODE  HARD
#4 SCANPRED   1   5
#4 SCANSUCC   4   20
;
; Core#5 parameters
#5 CPUTYPE    CNMIPS2
#5 ENDIAN     BIG
#5 JTAGDELAY  10
#5 STARTUP    WAIT    ;CPU is held in reset
#5 BREAKMODE  HARD
#5 SCANPRED   0   0
#5 SCANSUCC   5   25
;

[HOST]
#0  PROMPT      cnMIPS#0>
#1  PROMPT      cnMIPS#1>
#2  PROMPT      cnMIPS#2>
#3  PROMPT      cnMIPS#3>
#4  PROMPT      cnMIPS#4>
#5  PROMPT      cnMIPS#5>


[FLASH]
;Program boot flash in 16-bit mode
WORKSPACE   0x80001000          ;workspace in L2 cache
CHIPTYPE    MIRRORX16           ;Flash type
CHIPSIZE    0x00400000          ;The visible size of one flash chip in bytes
BUSWIDTH    16                  ;The width of the flash memory bus in bits
FILE        u-boot-octeon_ep6300c.bin
FORMAT      BIN 0xbfc00000
ERASE       0xbfc00000 0x20000 14


[REGS]
;used for all cores unless overridden
DMM1	0xFF300000      ;DSU base address
DMM2	0x80000000_0    ;xkphys segment
FILE	$regCNMIPS2.def