; bdiGDB configuration file for Cavium CN5230
; -------------------------------------------
;
; This configuration uses the monitor setup the board
;
[INIT]
;
; Invalidate Caches
;IVIC                            ;Invalidate IC
;IVDC                            ;Invalidate DC
;


[TARGET]
; common parameters
POWERUP     2000                ;power-up delay 2 seconds
JTAGCLOCK   1                   ;BDI3000:use 16 MHz JTAG clock
;JTAGCLOCK   0                   ;BDI2000:use 16 MHz JTAG clock
;
;======================================================
; !!!! defines the cores numbers without any holes !!!!
;======================================================
;
; Core#0 parameters (active core after reset)
#0 CPUTYPE     CNMIPS           ;the used target CPU type
#0 RESET       JTAG             ;don't use RESET HARD
#0 ENDIAN      BIG              ;target is big endian
#0 JTAGDELAY   5                ;40 TCK's access delay
;#0 STARTUP     HALT             ;halt as soon as possible
#0 STARTUP     STOP 5000        ;STOP mode is used to let the monitor init the system
#0 WORKSPACE   0xA0000080       ;workspace in target RAM for fast download
#0 BREAKMODE   HARD             ;SOFT or HARD
#0 SCANPRED    3   15           ;select last core in scan chain
#0 SCANSUCC    0   0
;
; Core#1 parameters
#1 CPUTYPE     CNMIPS
#1 RESET       NONE
#1 ENDIAN      BIG
#1 JTAGDELAY   5
#1 STARTUP     WAIT             ;CPU is held in reset
#1 BREAKMODE   HARD
#1 SCANPRED    2   10
#1 SCANSUCC    1   5
;
; Core#2 parameters
#2 CPUTYPE     CNMIPS
#2 RESET       NONE
#2 ENDIAN      BIG
#2 JTAGDELAY   5
#2 STARTUP     WAIT             ;CPU is held in reset
#2 BREAKMODE   HARD
#2 SCANPRED    1   5
#2 SCANSUCC    2   10
;
; Core#3 parameters
#3 CPUTYPE     CNMIPS
#3 RESET       NONE
#3 ENDIAN      BIG
#3 JTAGDELAY   5
#3 STARTUP     WAIT             ;CPU is held in reset
#3 BREAKMODE   HARD
#3 SCANPRED    0   0
#3 SCANSUCC    3   15
;
;======================================================


[HOST]
#0  PROMPT      cnMIPS#0>
#1  PROMPT      cnMIPS#1>
#2  PROMPT      cnMIPS#2>
#3  PROMPT      cnMIPS#3>


[FLASH]


[REGS]
;used for all cores unless overridden
DMM1	0xFF300000      ;DSU base address
DMM2	0x80000000_0    ;xkphys segment
FILE	$regCNMIPS.def