;Register definition for RC32438
;===============================
;
; name: user defined name of the register
; type: the type of the register
;       GPR     general purpose register
;       CP0     CP0 register
;       MM      memory mapped register
;       DMMx    direct memory mapped register with offset
;               x = 1..4
;               the base is defined in the configuration file
;               e.g. DMM1 0x02200000
; addr: the number, adddress or offset of the register
; size  the size of the register (8,16 or 32)
;
;name           type    addr            size
;-------------------------------------------
;
;
;       CP0 Registers
;
index           CP0     0
random          CP0     1
elo0            CP0     2
elo1            CP0     3
context         CP0     4
pmask           CP0     5
wired           CP0     6
bad             CP0     8
ehi             CP0     10
;
count           CP0     9
compare         CP0     11
status          CP0     12
cause           CP0     13
epc             CP0     14
prid            CP0     15
config          CP0     0x010
config1         CP0     0x110
lladdr          CP0     17
watchlo         CP0     18
watchhi         CP0     19
debug           CP0     23
depc            CP0     24
ecc             CP0     26
taglo           CP0     0x01c
datalo          CP0     0x11c
eepc            CP0     30
desave          CP0     31
;
;
;       DSU Registers
;
dcr             DMM1    0x0000
ibs             DMM1    0x1000
dbs             DMM1    0x2000
;
iba0            DMM1    0x1100
ibm0            DMM1    0x1108
ibasid0         DMM1    0x1110
ibc0            DMM1    0x1118
iba1            DMM1    0x1200
ibm1            DMM1    0x1208
ibasid1         DMM1    0x1210
ibc1            DMM1    0x1218
iba2            DMM1    0x1300
ibm2            DMM1    0x1308
ibasid2         DMM1    0x1310
ibc2            DMM1    0x1318
iba3            DMM1    0x1400
ibm3            DMM1    0x1408
ibasid3         DMM1    0x1410
ibc3            DMM1    0x1418
;
dba0            DMM1    0x2100
dbm0            DMM1    0x2108
dbasid0         DMM1    0x2110
dbc0            DMM1    0x2118
dbv0            DMM1    0x2120
dba1            DMM1    0x2200
dbm1            DMM1    0x2208
dbasid1         DMM1    0x2210
dbc1            DMM1    0x2218
dbv1            DMM1    0x2220
;
;       MEMORY MAPPED REGISTERS
;
;       System Identification
;
sysid           DMM2    0x00018
devtype         DMM2    0x0001C
;
;       Reset Controller
;
reset           DMM2    0x08000
bcv             DMM2    0x08004
cea             DMM2    0x08008
;
;       Device Controller
;
dev0base        DMM2    0x10000
dev0mask        DMM2    0x10004
dev0c           DMM2    0x10008
dev0tc          DMM2    0x1000C
dev1base        DMM2    0x10010
dev1mask        DMM2    0x10014
dev1c           DMM2    0x10018
dev1tc          DMM2    0x1001C
dev2base        DMM2    0x10020
dev2mask        DMM2    0x10024
dev2c           DMM2    0x10028
dev2tc          DMM2    0x1002C
dev3base        DMM2    0x10030
dev3mask        DMM2    0x10034
dev3c           DMM2    0x10038
dev3tc          DMM2    0x1003C
btcs            DMM2    0x10040
btcompare       DMM2    0x10044
btaddr          DMM2    0x10048
devdacs         DMM2    0x1004C
devdaa          DMM2    0x10050
devdad          DMM2    0x10054
;
;       DDR Controller
;
ddrbase         DMM2    0x18000
ddrmask         DMM2    0x18004
ddrc            DMM2    0x18010
ddrabase        DMM2    0x18014
ddramask        DMM2    0x18018
ddramap         DMM2    0x1801C
ddrcust         DMM2    0x18020
ddrrdc          DMM2    0x18024
;
;       Bus Arbiter
;
pmapp           DMM2    0x20000
pmasac          DMM2    0x20004
;
;       Counter/Timers
;
count0          DMM2    0x28000
compare0        DMM2    0x28004
ctc0            DMM2    0x28008
ctcsel0         DMM2    0x2800C
count1          DMM2    0x28010
compare1        DMM2    0x28014
ctc1            DMM2    0x28018
ctcsel1         DMM2    0x2801C
count2          DMM2    0x28020
compare2        DMM2    0x28024
ctc2            DMM2    0x28028
ctcsel2         DMM2    0x2802C
rcount          DMM2    0x28030
rcompare        DMM2    0x28034
rtc             DMM2    0x28038
;
;       System Integrity Features
;
errcs           DMM2    0x30030
wtcount         DMM2    0x30034
wtcompare       DMM2    0x30038
wtc             DMM2    0x3003C
;
;       Interrupt Controller
;
ipend2          DMM2    0x38000
itest2          DMM2    0x38004
imask2          DMM2    0x38008
ipend3          DMM2    0x3800C
itest3          DMM2    0x38010
imask3          DMM2    0x38014
ipend4          DMM2    0x38018
itest4          DMM2    0x3801C
imask4          DMM2    0x38020
ipend5          DMM2    0x38024
itest5          DMM2    0x38028
imask5          DMM2    0x3802C
ipend6          DMM2    0x38030
itest6          DMM2    0x38034
imask6          DMM2    0x38038
nmips           DMM2    0x3803C
;
;       DMA Controller
;
dma0c           DMM2    0x40000
dma0s           DMM2    0x40004
dma0sm          DMM2    0x40008
dma0dptr        DMM2    0x4000C
dma0ndptr       DMM2    0x40010
dma1c           DMM2    0x40014
dma1s           DMM2    0x40018
dma1sm          DMM2    0x4001C
dma1dptr        DMM2    0x40020
dma1ndptr       DMM2    0x40024
dma2c           DMM2    0x40028
dma2s           DMM2    0x4002C
dma2sm          DMM2    0x40030
dma2dptr        DMM2    0x40034
dma2ndptr       DMM2    0x40038
dma3c           DMM2    0x4003C
dma3s           DMM2    0x40040
dma3sm          DMM2    0x40044
dma3dptr        DMM2    0x40048
dma3ndptr       DMM2    0x4004C
dma4c           DMM2    0x40050
dma4s           DMM2    0x40054
dma4sm          DMM2    0x40058
dma4dptr        DMM2    0x4005C
dma4ndptr       DMM2    0x40060
dma5c           DMM2    0x40064
dma5s           DMM2    0x40068
dma5sm          DMM2    0x4006C
dma5dptr        DMM2    0x40070
dma5ndptr       DMM2    0x40074
;
;       IPBUS Arbiter
;
ipap0c          DMM2    0x48000
ipap1c          DMM2    0x48004
ipap2c          DMM2    0x48008
ipap3c          DMM2    0x4800C
ipabm0c         DMM2    0x48010
ipabm1c         DMM2    0x48014
ipabm2c         DMM2    0x48018
ipabm3c         DMM2    0x4801C
ipabm4c         DMM2    0x48020
ipabm5c         DMM2    0x48024
ipabm6c         DMM2    0x48028
ipabm7c         DMM2    0x4802C
ipabm8c         DMM2    0x48030
ipac            DMM2    0x48034
ipaitcc         DMM2    0x48038
;
;       GPIO Controller
;
gpiofunc        DMM2    0x50000
gpiocfg         DMM2    0x50004
gpiod           DMM2    0x50008
gpioilevel      DMM2    0x5000C
gpioistat       DMM2    0x50010
gpionmien       DMM2    0x50014
;
;       UART
;
uart0rb         DMM2    0x58000
uart0th         DMM2    0x58000
uart0dll        DMM2    0x58000
uart0ie         DMM2    0x58004
uart0dlh        DMM2    0x58004
uart0ii         DMM2    0x58008
uart0fc         DMM2    0x58008
uart0lc         DMM2    0x5800C
uart0mc         DMM2    0x58010
uart0ls         DMM2    0x58014
uart0ms         DMM2    0x58018
uart0s          DMM2    0x5801C
uart1rb         DMM2    0x58020
uart1th         DMM2    0x58020
uart1dll        DMM2    0x58020
uart1ie         DMM2    0x58024
uart1dlh        DMM2    0x58024
uart1ii         DMM2    0x58028
uart1fc         DMM2    0x58028
uart1lc         DMM2    0x5802C
uart1mc         DMM2    0x58030
uart1ls         DMM2    0x58034
uart1ms         DMM2    0x58038
uart1s          DMM2    0x5803C
uart0rr         DMM2    0x58040
uart1rr         DMM2    0x58044
;
;       Ethernet Interface
;
eth0intfc       DMM2    0x60000
eth0fifott      DMM2    0x60004
eth0arc         DMM2    0x60008
eth0hash0       DMM2    0x6000C
eth0hash1       DMM2    0x60010
eth0pfs         DMM2    0x60024
ethmcp          DMM2    0x60028
eth0sal0        DMM2    0x60100
eth0sah0        DMM2    0x60104
eth0sal1        DMM2    0x60108
eth0sah1        DMM2    0x6010C
eth0sal2        DMM2    0x60110
eth0sah2        DMM2    0x60114
eth0sal3        DMM2    0x60118
eth0sah3        DMM2    0x6011C
eth0rbc         DMM2    0x60120
eth0rpc         DMM2    0x60124
eth0rupc        DMM2    0x60128
eth0rfc         DMM2    0x6012C
eth0tbc         DMM2    0x60130
eth0gpf         DMM2    0x60134
eth0mac1        DMM2    0x60200
eth0mac2        DMM2    0x60204
eth0ipgt        DMM2    0x60208
eth0ipgr        DMM2    0x6020C
eth0clrt        DMM2    0x60210
eth0maxf        DMM2    0x60214
eth0mtest       DMM2    0x6021C
miimcfg         DMM2    0x60220
miimcmd         DMM2    0x60224
miimaddr        DMM2    0x60228
miimwtd         DMM2    0x6022C
miimrdd         DMM2    0x60230
miimind         DMM2    0x60234
eth0cfsa0       DMM2    0x60240
eth0cfsa1       DMM2    0x60244
eth0cfsa2       DMM2    0x60248
;
;       I2C controller
;
i2cc            DMM2    0x68000
i2cdi           DMM2    0x68004
i2cdo           DMM2    0x68008
i2ccp           DMM2    0x6800C
i2cmcmd         DMM2    0x68010
i2cms           DMM2    0x68014
i2cmsm          DMM2    0x68018
i2css           DMM2    0x6801C
i2cssm          DMM2    0x68020
i2csaddr        DMM2    0x68024
i2csack         DMM2    0x68028
;
;       SPI Interface
;
spcp            DMM2    0x70000
spc             DMM2    0x70004
sps             DMM2    0x70008
spd             DMM2    0x7000C
siofunc         DMM2    0x70010
siocfg          DMM2    0x70014
siod            DMM2    0x70018
;
;       NVRAM Memory
;
nvrcmd          DMM2    0x78000
nvrs            DMM2    0x78004
nvrsm           DMM2    0x78008
nvrcfg0         DMM2    0x7800c
nvrcfg0         DMM2    0x78010
nvrdata0        DMM2    0x7A000
nvrdata1        DMM2    0x7A004
nvrdata2        DMM2    0x7A008
nvrdata3        DMM2    0x7A00c
nvrdata4        DMM2    0x7A010
nvrdata5        DMM2    0x7A014
nvrdata6        DMM2    0x7A018
nvrdata7        DMM2    0x7A01c
nvrdata8        DMM2    0x7A020
nvrdata9        DMM2    0x7A024
nvrdata10       DMM2    0x7A028
nvrdata11       DMM2    0x7A02c
nvrdata12       DMM2    0x7A030
nvrdata13       DMM2    0x7A034
nvrdata14       DMM2    0x7A038
nvrdata15       DMM2    0x7A03c
nvrdata16       DMM2    0x7A040
nvrdata17       DMM2    0x7A044
nvrdata18       DMM2    0x7A048
nvrdata19       DMM2    0x7A04c
nvrdata20       DMM2    0x7A050
nvrdata21       DMM2    0x7A054
nvrdata22       DMM2    0x7A058
nvrdata23       DMM2    0x7A05c
nvrdata24       DMM2    0x7A060
nvrdata25       DMM2    0x7A064
nvrdata26       DMM2    0x7A068
nvrdata27       DMM2    0x7A06c
nvrdata28       DMM2    0x7A070
nvrdata29       DMM2    0x7A074
nvrdata30       DMM2    0x7A078
nvrdata31       DMM2    0x7A07c
;
;       PCI Interface
;
pcic            DMM2    0x80000
pcis            DMM2    0x80004
pcism           DMM2    0x80008
pcicfga         DMM2    0x8000C
pcicfgd         DMM2    0x80010
pcilba0         DMM2    0x80014
pcilba0c        DMM2    0x80018
pcilba0m        DMM2    0x8001c
pcilba1         DMM2    0x80020
pcilba1c        DMM2    0x80024
pcilba1m        DMM2    0x80028
pcilba2         DMM2    0x8002c
pcilba2c        DMM2    0x80030
pcilba2m        DMM2    0x80034
pcilba3         DMM2    0x80038
pcilba3c        DMM2    0x8003c
pcilba3m        DMM2    0x80040
pcidac          DMM2    0x80044
pcidas          DMM2    0x80048
pcidasm         DMM2    0x8004c
pcidad          DMM2    0x80050
pcidma4c        DMM2    0x80054
pcidma5c        DMM2    0x80058
pcitc           DMM2    0x8005c
pciim0          DMM2    0x88010
pciim1          DMM2    0x88014
pciom0          DMM2    0x88018
pciom1          DMM2    0x8801C
pciid           DMM2    0x88020
pciiic          DMM2    0x88024
pciiim          DMM2    0x88028
pciod           DMM2    0x8802c
pcioic          DMM2    0x88030
pcioim          DMM2    0x88034
