;Register definition for MCF5445x ;================================ ; ; name: user defined name of the register ; type: the type of the register ; DREG data register ; AREG address register ; CREG control register ; MM memory mapped register ; DMMx direct memory mapped register with offset ; x = 1..4 ; the base is defined in the configuration file ; e.g. DMM1 0x02200000 ; addr: the number, adddress or offset of the register ; size the size of the register (8,16 or 32) ; ;name type addr size ;------------------------------------------- ; ; Additional Control Register ; cacr CREG 0x002 32 asid CREG 0x003 32 acr0 CREG 0x004 32 acr1 CREG 0x005 32 acr2 CREG 0x006 32 acr3 CREG 0x007 32 mmubar CREG 0x008 32 ; othera7 CREG 0x800 32 macsr CREG 0x804 32 mask CREG 0x805 32 acc0 CREG 0x806 32 accext01 CREG 0x807 32 accext23 CREG 0x808 32 acc1 CREG 0x809 32 acc2 CREG 0x80A 32 acc3 CREG 0x80B 32 ; rambar CREG 0xc05 32 ; ; ; DMM1 must be set to the MMU memory space ; mmucr DMM1 0x000 32 mmuor DMM1 0x004 32 mmusr DMM1 0x008 32 mmuar DMM1 0x010 32 mmutr DMM1 0x014 32 mmudr DMM1 0x018 32 ; ; ; Clock Module pcr MM 0xFC0C4000 32 psr MM 0xFC0C4004 32 ; ; Power Management wkupcr MM 0xFC040013 8 ppmsr0 MM 0xFC04002C 8 ppmcr0 MM 0xFC04002D 8 ppmhr0 MM 0xFC040030 32 ppmlr0 MM 0xFC040034 32 lpcr MM 0xFC0A0007 8 misccr MM 0xFC0A0010 16 cdr MM 0xFC0A0012 16 ; ; Chip Configuration Module (CCM) ccr MM 0xFC0A0004 16 rcon MM 0xFC0A0008 16 cir MM 0xFC0A000A 16 misccr MM 0xFC0A0010 16 cdr MM 0xFC0A0012 16 uocsr MM 0xFC0A0014 16 sbfsr MM 0xFC0A0018 16 sbfcr MM 0xFC0A0020 16 ; ; Reset Controller Module rcr MM 0xFC0A0000 8 rsr MM 0xFC0A0001 8 ; ; System Control Module (SCM) mpr MM 0xFC000000 32 pacra MM 0xFC000020 32 pacrb MM 0xFC000024 32 pacrc MM 0xFC000028 32 pacrd MM 0xFC00002C 32 pacre MM 0xFC000040 32 pacrf MM 0xFC000044 32 pacrg MM 0xFC000048 32 ; cwcr MM 0xFC040016 16 cwsr MM 0xFC04001B 8 scmisr MM 0xFC04001F 8 bcr MM 0xFC040024 32 cfadr MM 0xFC040070 32 cfier MM 0xFC040075 8 cfloc MM 0xFC040076 8 cfatr MM 0xFC040077 8 cfdtr MM 0xFC04007C 32 ; ; Cross-Bar Switch Module (XBS) xbs_prs1 MM 0xFC004100 32 xbs_crs1 MM 0xFC004110 32 xbs_prs2 MM 0xFC004200 32 xbs_crs2 MM 0xFC004210 32 xbs_prs3 MM 0xFC004300 32 xbs_crs3 MM 0xFC004310 32 xbs_prs4 MM 0xFC004400 32 xbs_crs4 MM 0xFC004410 32 xbs_prs5 MM 0xFC004500 32 xbs_crs5 MM 0xFC004510 32 xbs_prs7 MM 0xFC004700 32 xbs_crs7 MM 0xFC004710 32 ; ; Edge Port Module (EPORT) eppar MM 0xFC094000 16 epddr MM 0xFC094002 8 epier MM 0xFC094003 8 epdr MM 0xFC094004 8 eppdr MM 0xFC094005 8 epfr MM 0xFC094006 8 ; ; Chip Select Registers csar0 MM 0xFC008000 32 csmr0 MM 0xFC008004 32 cscr0 MM 0xFC008008 32 csar1 MM 0xFC00800C 32 csmr1 MM 0xFC008010 32 cscr1 MM 0xFC008014 32 csar2 MM 0xFC008018 32 csmr2 MM 0xFC00801C 32 cscr2 MM 0xFC008020 32 csar3 MM 0xFC008024 32 csmr3 MM 0xFC008028 32 cscr3 MM 0xFC00802C 32 csar4 MM 0xFC008030 32 csmr4 MM 0xFC008034 32 cscr4 MM 0xFC008038 32 csar5 MM 0xFC00803C 32 csmr5 MM 0xFC008040 32 cscr5 MM 0xFC008044 32 ; ; SDRAM Controller (SDRAMC) sdmr MM 0xFC0B8000 32 sdcr MM 0xFC0B8004 32 sdcfg1 MM 0xFC0B8008 32 sdcfg2 MM 0xFC0B800C 32 sdcs0 MM 0xFC0B8110 32 sdcs1 MM 0xFC0B8114 32 ; ; Programmable Interrupt Timer Modules (PIT0–PIT3) pcsr0 MM 0xFC080000 16 pcsr1 MM 0xFC084000 16 pcsr2 MM 0xFC088000 16 pcsr3 MM 0xFC08C000 16 pmr0 MM 0xFC080002 16 pmr1 MM 0xFC084002 16 pmr2 MM 0xFC088002 16 pmr3 MM 0xFC08C002 16 pcntr0 MM 0xFC080004 16 pcntr1 MM 0xFC084004 16 pcntr2 MM 0xFC088004 16 pcntr3 MM 0xFC08C004 16 ; ; DMA Timers (DTIM0–DTIM3) dtmr0 MM 0xFC070000 16 dtmr1 MM 0xFC074000 16 dtmr2 MM 0xFC078000 16 dtmr3 MM 0xFC07C000 16 dtxmr0 MM 0xFC070002 8 dtxmr1 MM 0xFC074002 8 dtxmr2 MM 0xFC078002 8 dtxmr3 MM 0xFC07C002 8 dter0 MM 0xFC070003 8 dter1 MM 0xFC074003 8 dter2 MM 0xFC078003 8 dter3 MM 0xFC07C003 8 dtrr0 MM 0xFC070004 32 dtrr1 MM 0xFC074004 32 dtrr2 MM 0xFC078004 32 dtrr3 MM 0xFC07C004 32 dtcr0 MM 0xFC070008 32 dtcr1 MM 0xFC074008 32 dtcr2 MM 0xFC078008 32 dtcr3 MM 0xFC07C008 32 dtcn0 MM 0xFC07000C 32 dtcn1 MM 0xFC07400C 32 dtcn2 MM 0xFC07800C 32 dtcn3 MM 0xFC07C00C 32 ; ; I2C Interface i2adr MM 0xFC058000 8 i2fdr MM 0xFC058004 8 i2cr MM 0xFC058008 8 i2sr MM 0xFC05800C 8 i2dr MM 0xFC058010 8 ; ; Fast Ethernet Controller (FEC0) eir0 MM 0xFC030004 32 eimr0 MM 0xFC030008 32 rdar0 MM 0xFC030010 32 tdar0 MM 0xFC030014 32 ecr0 MM 0xFC030024 32 mmfr0 MM 0xFC030040 32 mscr0 MM 0xFC030044 32 mibc0 MM 0xFC030064 32 rcr0 MM 0xFC030084 32 tcr0 MM 0xFC0300C4 32 palr0 MM 0xFC0300E4 32 paur0 MM 0xFC0300E8 32 opd0 MM 0xFC0300EC 32 iaur0 MM 0xFC030118 32 ialr0 MM 0xFC03011C 32 gaur0 MM 0xFC030120 32 galr0 MM 0xFC030124 32 tfwr0 MM 0xFC030144 32 frbr0 MM 0xFC03014C 32 frsr0 MM 0xFC030150 32 erdsr0 MM 0xFC030180 32 etdsr0 MM 0xFC030184 32 emrbr0 MM 0xFC030188 32 ; ; Fast Ethernet Controller (FEC0) eir1 MM 0xFC034004 32 eimr1 MM 0xFC034008 32 rdar1 MM 0xFC034010 32 tdar1 MM 0xFC034014 32 ecr1 MM 0xFC034024 32 mmfr1 MM 0xFC034040 32 mscr1 MM 0xFC034044 32 mibc1 MM 0xFC034064 32 rcr1 MM 0xFC034084 32 tcr1 MM 0xFC0340C4 32 palr1 MM 0xFC0340E4 32 paur1 MM 0xFC0340E8 32 opd1 MM 0xFC0340EC 32 iaur1 MM 0xFC034118 32 ialr1 MM 0xFC03411C 32 gaur1 MM 0xFC034120 32 galr1 MM 0xFC034124 32 tfwr1 MM 0xFC034144 32 frbr1 MM 0xFC03414C 32 frsr1 MM 0xFC034150 32 erdsr1 MM 0xFC034180 32 etdsr1 MM 0xFC034184 32 emrbr1 MM 0xFC034188 32 ; ; Port Output Data Registers podr_fec0h MM 0xFC0A4000 8 podr_fec0l MM 0xFC0A4001 8 podr_ssi MM 0xFC0A4002 8 podr_fbctl MM 0xFC0A4003 8 podr_be MM 0xFC0A4004 8 podr_cs MM 0xFC0A4005 8 podr_dma MM 0xFC0A4006 8 podr_feci2c MM 0xFC0A4007 8 podr_uart MM 0xFC0A4009 8 podr_dspi MM 0xFC0A400A 8 podr_timer MM 0xFC0A400B 8 podr_pci MM 0xFC0A400C 8 podr_usb MM 0xFC0A400D 8 podr_atah MM 0xFC0A400E 8 podr_atal MM 0xFC0A400F 8 podr_fec1h MM 0xFC0A4010 8 podr_fec1l MM 0xFC0A4011 8 podr_fbadh MM 0xFC0A4014 8 podr_fbadmh MM 0xFC0A4015 8 podr_fbadml MM 0xFC0A4016 8 podr_fbadl MM 0xFC0A4017 8 ; ; Port Data Direction Registers pddr_fec0h MM 0xFC0A4018 8 pddr_fec0l MM 0xFC0A4019 8 pddr_ssi MM 0xFC0A401A 8 pddr_fbctl MM 0xFC0A401B 8 pddr_be MM 0xFC0A401C 8 pddr_cs MM 0xFC0A401D 8 pddr_dma MM 0xFC0A401E 8 pddr_feci2c MM 0xFC0A401F 8 pddr_uart MM 0xFC0A4021 8 pddr_dspi MM 0xFC0A4022 8 pddr_timer MM 0xFC0A4023 8 pddr_pci MM 0xFC0A4024 8 pddr_usb MM 0xFC0A4025 8 pddr_atah MM 0xFC0A4026 8 pddr_atal MM 0xFC0A4027 8 pddr_fec1h MM 0xFC0A4028 8 pddr_fec1l MM 0xFC0A4029 8 pddr_fbadh MM 0xFC0A402C 8 pddr_fbadmh MM 0xFC0A402D 8 pddr_fbadml MM 0xFC0A402E 8 pddr_fbadl MM 0xFC0A402F 8 ; ; Port Pin Data/Set Data Registers ppdsdr_fec0h MM 0xFC0A4030 8 ppdsdr_fec0l MM 0xFC0A4031 8 ppdsdr_ssi MM 0xFC0A4032 8 ppdsdr_fbctl MM 0xFC0A4033 8 ppdsdr_be MM 0xFC0A4034 8 ppdsdr_cs MM 0xFC0A4035 8 ppdsdr_dma MM 0xFC0A4036 8 ppdsdr_feci2c MM 0xFC0A4037 8 ppdsdr_uart MM 0xFC0A4039 8 ppdsdr_dspi MM 0xFC0A403A 8 ppdsdr_timer MM 0xFC0A403B 8 ppdsdr_pci MM 0xFC0A403C 8 ppdsdr_usb MM 0xFC0A403D 8 ppdsdr_atah MM 0xFC0A403E 8 ppdsdr_atal MM 0xFC0A403F 8 ppdsdr_fec1h MM 0xFC0A4040 8 ppdsdr_fec1l MM 0xFC0A4041 8 ppdsdr_fbadh MM 0xFC0A4044 8 ppdsdr_fbadmh MM 0xFC0A4045 8 ppdsdr_fbadml MM 0xFC0A4046 8 ppdsdr_fbadl MM 0xFC0A4047 8 ; ; Port Clear Output Data Registers pclrr_fec0h MM 0xFC0A4048 8 pclrr_fec0l MM 0xFC0A4049 8 pclrr_ssi MM 0xFC0A404A 8 pclrr_fbctl MM 0xFC0A404B 8 pclrr_be MM 0xFC0A404C 8 pclrr_cs MM 0xFC0A404D 8 pclrr_dma MM 0xFC0A404E 8 pclrr_feci2c MM 0xFC0A404F 8 pclrr_uart MM 0xFC0A4051 8 pclrr_dspi MM 0xFC0A4052 8 pclrr_timer MM 0xFC0A4053 8 pclrr_pci MM 0xFC0A4054 8 pclrr_usb MM 0xFC0A4055 8 pclrr_atah MM 0xFC0A4056 8 pclrr_atal MM 0xFC0A4057 8 pclrr_fec1h MM 0xFC0A4058 8 pclrr_fec1l MM 0xFC0A405A 8 pclrr_fbadh MM 0xFC0A405C 8 pclrr_fbadmh MM 0xFC0A405D 8 pclrr_fbadml MM 0xFC0A405E 8 pclrr_fbadl MM 0xFC0A405F 8 ; ; Pin Assignment Registers par_fec MM 0xFC0A4060 8 par_dma MM 0xFC0A4061 8 par_fbctl MM 0xFC0A4062 8 par_dspi MM 0xFC0A4063 8 par_be MM 0xFC0A4064 8 par_cs MM 0xFC0A4065 8 par_timer MM 0xFC0A4066 8 par_usb MM 0xFC0A4067 8 par_uart MM 0xFC0A4069 8 par_feci2c MM 0xFC0A406A 16 par_ssi MM 0xFC0A406C 16 par_ata MM 0xFC0A406E 16 par_irq MM 0xFC0A4070 8 par_pci MM 0xFC0A4072 16 ; ; Mode Select Control Registers mscr_sdram MM 0xFC0A4074 8 mscr_pci MM 0xFC0A4075 8 ; ; Drive Strength Control Registers DSCR_I2C MM 0xFC0A4078 8 DSCR_FLEXBUS MM 0xFC0A4079 8 DSCR_FEC MM 0xFC0A407A 8 DSCR_UART MM 0xFC0A407B 8 DSCR_DSPI MM 0xFC0A407C 8 DSCR_TIMER MM 0xFC0A407D 8 DSCR_SSI MM 0xFC0A407E 8 DSCR_DMA MM 0xFC0A407F 8 DSCR_DEBUG MM 0xFC0A4080 8 DSCR_RESET MM 0xFC0A4081 8 DSCR_IRQ MM 0xFC0A4082 8 DSCR_USB MM 0xFC0A4083 8 DSCR_ATA MM 0xFC0A4084 8 ;