; Configuration file for a M5253C3 board
; --------------------------------------
;
; the initialistion list used to setup the target system
[INIT]
;
;	=== Init SIM Module ===
WCREG   0xC0F       0x10000001	;MBAR:  map registers to 0x10000000
WCREG   0xC0E       0x80000001	;MBAR2: map registers to 0x80000000
WCREG   0xC04       0x20000021	;RAMBAR0: map 64K SRAM0 to 0x20000000
WCREG   0xC05       0x20010021	;RAMBAR1: map 64K SRAM1 to 0x20020000
;
;	=== Speed-up clock ===
WM32	0x80000180  0x1243E054	;PLLCR: set CPU clock to 140MHz
WM32	0x80000180  0x1243E055  ;PLLCR: switch to PLL
DELAY		    50          ;Let PLL lock
;
;	=== Flash Chipselect ===
WM16	0x10000080  0xFFE0	;CSAR0: Flash at 0xFFE00000
WM16	0x1000008A  0x1180	;CSCR0: Flash 4 waits, 16bit,
WM32	0x10000084  0x001F0021	;CSMR0: Flash 2MB, R/W, valid
;
;	=== Init DRAM Controller (same as dBug) ===
WM16	0x10000100  0x8255	;DCR: SDRAM Trc=6, RC=85
WM32	0x10000108  0x00003224	;DACR0: base=0x00000000
WM32	0x1000010C  0x007C0001	;DMR0: mask=16MB; enable
WM32	0x10000108  0x0000322C	;DACR0: Initiate Precharge All Command
WM32	0x00000000  0xa5a59696	;Execute PALL command
WM32	0x10000108  0x0000b224	;DACR0: enable refresh
DELAY		    20          ;Delay for Refresh
WM32	0x10000108  0x0000b264	;DACR0: Initiate Mode Register Set Command
WM32	0x00000800  0xa5a59696	;Execute MRS command
;
;       === Define the valid memory map ===
MMAP    0x00000000  0x007FFFFF  ;Memory range for 8MB SDRAM
MMAP    0x10000000  0x100004FF  ;Memory map for Internal Register
MMAP    0x20000000  0x20007FFF  ;Memory map for On-chip SRAM0
MMAP    0x20010000  0x2001FFFF  ;Memory map for On-chip SRAM1
MMAP    0x80000000  0x800004FF  ;Memory map for Internal Register 2
MMAP    0xFFE00000  0xFFFFFFFF  ;Memory range for Flash ROM (CS0)
MMAP    0xE0000000  0xE01FFFFF  ;Memory range for Ethernet  (CS1)
;
;

[TARGET]
CPUTYPE     MCF5253
CPUCLOCK    140000000   ;the CPU clock rate after processing the init list
;CPUCLOCK    11000000    ;the CPU clock rate after processing the init list
BREAKMODE   SOFT        ;SOFT or HARD

[HOST]
IP          151.120.25.119
FILE        E:\cygwin\home\demo\mcf\fibo.x
FORMAT      ELF
LOAD        MANUAL      ;load code MANUAL or AUTO after reset
DUMP        E:\temp\dump.bin
PROMPT      MCF5253>

[FLASH]
WORKSPACE   0x20000000  ;workspace in target RAM for fast programming algorithm
CHIPTYPE    AM29BX16    ;Flash type is AM29LV160DB
CHIPSIZE    0x200000    ;The size of one flash chip in bytes
BUSWIDTH    16          ;The width of the flash memory bus in bits (8 | 16 | 32)

FILE        e:/temp/dump512k.bin
FORMAT      BIN 0xFFF00000
ERASE       0xFFF00000 0x10000 8 ;erase 512k


[REGS]
DMM1	0x10000000
DMM2	0x80000000
FILE    $reg5253.def