; Configuration file for the M5208EVB
; -----------------------------------
;
; the initialistion list used to setup the target system
[INIT]
;
WCREG   0x801	    0x40000000  ;VBR: Set VBR to the beginning of SDRAM
WCREG   0xC05	    0x80000021  ;RAMBAR: Internal SRAM  at 0x80000000
WM16    0xFC08C000  0x0000      ;WCR: Disable Watchdog
;
; Init flash chip select
WM32    0xFC008000  0x00000000  ;CSAR0: map to 0x00000000
WM32    0xFC008008  0x00001FA0  ;CSCR0: 16-bit port, 7 wait states
WM32    0xFC008004  0x001F0001  ;CSMR0: size is 2 MB r/w
;
;SDRAM Initialization
WM32    0xFC0A8110  0x40000018  ;SDCS0
WM32    0xFC0A8008  0x43711630  ;SDCFG1
WM32    0xFC0A800C  0x56670000  ;SDCFG2
WM32    0xFC0A8004  0xE1092002  ;SDCR: Issue PALL
WM32    0xFC0A8000  0x40010000  ;SDMR: Issue LEMR
WM32    0xFC0A8000  0x058D0000  ;SDMR: Write mode register
DELAY   100
WM32    0xFC0A8004  0xE1092002  ;SDCR: Issue PALL
WM32    0xFC0A8004  0xE1092004  ;SDCR: Perform two refresh cycles
WM32    0xFC0A8004  0xE1092004  ;SDCR
WM32    0xFC0A8000  0x018D0000  ;SDMR
WM32    0xFC0A8004  0x71092C00  ;SDCR
DELAY   100
;
;       === Define the valid memory map ===
MMAP    0x00000000  0x001FFFFF  ; 2MB Flash
MMAP    0x40000000  0x41FFFFFF  ;32MB SDRAM
MMAP    0x80000000  0x80003FFF  ;16KB Internal SRAM
MMAP    0xFC000000  0xFFFFFFFF  ;Peripheral Registers
;


[TARGET]
CPUTYPE     MCF5208
CPUCLOCK    166000000    ;the CPU clock rate after processing the init list
BREAKMODE   HARD        ;SOFT or HARD
;WAKEUP      1000

[HOST]
IP          151.120.25.119
FILE        E:\cygwin\home\demo\mcf\fibo.x
FORMAT      ELF
LOAD        MANUAL      ;load code MANUAL or AUTO after reset
PROMPT      5208>

[FLASH]
WORKSPACE   0x80000000  ;workspace in internal RAM for fast programming algorithm
CHIPTYPE    AM29DX16    ;Flash type is AM29BDD160G
CHIPSIZE    0x200000    ;Flash size is 2MB
BUSWIDTH    16          ;Flash is used in 16-bit mode
FILE        E:\Cygwin\home\bdidemo\ColdFire\m5208evb.bin
FORMAT      BIN 0x00000000


[REGS]
FILE    $reg5208.def