; Configuration file for M5445EVB ; ------------------------------- ; ; The values used to configure the memory controller ; are the ones U-boot uses to setup my board. ; Your system may need different ones !!! ; [INIT] WCREG 0x801 0x40000000 ;VBR: Set VBR to the beginning of SDRAM WCREG 0xC05 0x80000221 ;RAMBAR: Internal SRAM at 0x80000000 WCREG 0x008 0xE1000001 ;MMUBAR: map MMU registers to 0xE1000000 ; ; Set PLL control register, reference is 25MHz WM32 0xFC0C4000 0x1077FF31 ;PCR: VCO 400, CPU 200, I-Bus 100, FlexBus 25 ; ; Init chip selects WM32 0xFC008000 0x04000000 ;CSAR0: Flash0 at 0x04000000 WM32 0xFC008008 0x00001140 ;CSCR0: 8-bit port, 4 wait states WM32 0xFC008004 0x00070001 ;CSMR0: size is 512kB r/w WM32 0xFC00800C 0x00000000 ;CSAR1: Flash1 at 0x00000000 WM32 0xFC008014 0x00000d60 ;CSCR1: 8-bit port, 3 wait states WM32 0xFC008010 0x01ff0001 ;CSMR1: size is 32MB r/w WM32 0xFC008018 0x08000000 ;CSAR2: CPLD at 0x08000000 WM32 0xFC008020 0x003f1140 ;CSCR2: 8-bit port, 4 wait states WM32 0xFC00801C 0x00070001 ;CSMR2: size is 512kB r/w WM32 0xFC008024 0x09000000 ;CSAR3: FPGA at 0x09000000 WM32 0xFC00802C 0x00000020 ;CSCR3: 32-bit port, external termination WM32 0xFC008028 0x00070001 ;CSMR3: size is 512kB r/w ; ; SDRAM Initialization WM8 0xFC0A4074 0xAA ;MSCR: SSTL 1.8V I/O for DDR2 WM32 0xFC0B8110 0x4000001A ;SDCS0: 128MB at 0x40000000 WM32 0xFC0B8114 0x4800001A ;SDCS1: 128MB at 0x48000000 WM32 0xFC0B8008 0x65311610 ;SDCFG1: WM32 0xFC0B800C 0x59670000 ;SDCFG2: WM32 0xFC0B8004 0xEA0B2002 ;SDCR: Issue PALL WM32 0xFC0B8000 0x40010408 ;SDMR: Issue LEMR WM32 0xFC0B8000 0x00010333 ;SDMR: Write mode register DELAY 100 WM32 0xFC0B8004 0xEA0B2002 ;SDCR: Issue PALL WM32 0xFC0B8004 0xEA0B2004 ;SDCR: Perform two refresh cycles WM32 0xFC0B8004 0xEA0B2004 ;SDCR: WM32 0xFC0B8000 0x00010233 ;SDMR: WM32 0xFC0B8004 0x7A0B2C00 ;SDCR: DELAY 100 ; ; Clear flash lock-bits (28F128J3) WM8 0x00000000 0x60 ;clear Lock-Bits command WM8 0x00000000 0xD0 DELAY 1000 ;needs up to 0.7 sec WM8 0x00000000 0xFF ;set flash to read mode ; [TARGET] CPUTYPE MCF5445 PSTCLK 100000000 ;the PSTCLK clock rate after processing the init list BREAKMODE SOFT ;SOFT or HARD [HOST] IP 151.120.25.119 FILE E:/temp/dump1024k.bin FORMAT BIN 0x40000000 PROMPT M5445EVB> [FLASH] WORKSPACE 0x80000000 ;workspace in internal RAM for fast programming algorithm CHIPTYPE STRATAX8 ;Flash type is I28F128J3 CHIPSIZE 0x1000000 ;Flash size is 16MB BUSWIDTH 8 ;Flash is used in 8-bit mode FILE E:\temp\dump1024k.bin FORMAT BIN 0x00300000 ERASE 0x00300000 0x20000 8 ;erase 8 blocks [REGS] DMM1 0xE1000000 ; MMUBAR FILE $reg5445.def