;Register definition for ARM Cortex-M0 ;===================================== ; ; name: user defined name of the register ; type: the type of the register ; GPR general purpose register ; MM memory mapped register ; DMMx direct memory mapped register with offset ; x = 1..4 ; the base is defined in the configuration file ; e.g. DMM1 0x02200000 ; addr: the number, adddress or offset of the register ; size the size of the register (8,16 or 32) ; ; ;name type addr size ;------------------------------------------- ; sp_main GPR 17 32 ;Main Stackpointer sp_process GPR 18 32 ;Process Stackpointer ctr_fm_bp_pm GPR 20 32 ;Control,FaultMask,BasePri,PriMask ; ; Core debug registres dhcsr MM 0xE000EDF0 32 ;Debugging Halting Control and Status dcrsr MM 0xE000EDF4 32 ;Debug Core Register Selector dcrdr MM 0xE000EDF8 32 ;Debug Core Register Data demcr MM 0xE000EDFC 32 ;Debug Core Register Selector dfsr MM 0xE000ED30 32 ;Debug Fault Status ; ; System debug registres bp_ctrl MM 0xE0002000 32 ;Breakpoint Control bp_comp0 MM 0xE0002008 32 ;Breakpoint Comparator bp_comp1 MM 0xE000200C 32 ;Breakpoint Comparator bp_comp2 MM 0xE0002010 32 ;Breakpoint Comparator bp_comp3 MM 0xE0002014 32 ;Breakpoint Comparator ; dwt_ctrl MM 0xE0001000 32 ;DWT Control dwt_pcsr MM 0xE000101C 32 ;DWT PC Sample dwt_comp0 MM 0xE0001020 32 ;DWT Comparator dwt_mask0 MM 0xE0001024 32 ;DWT Mask dwt_function0 MM 0xE0001028 32 ;DWT Function dwt_comp1 MM 0xE0001030 32 ;DWT Comparator dwt_mask1 MM 0xE0001034 32 ;DWT Mask dwt_function1 MM 0xE0001038 32 ;DWT Function ; ; Miscellaneous Control Module (MCM) mcm_plasc MM 0xF0003008 16 ;Crossbar Switch (AXBS) Slave Configuration mcm_plamc MM 0xF000300A 16 ;Crossbar Switch (AXBS) Master Configuration mcm_placr MM 0xF000300C 32 ;Platform Control Register mcm_cpo MM 0xF0003040 32 ;Compute Operation Control Register ;