; ---------------------------------------
; bdiGDB configuration for IAR LPC1114-SK
; ---------------------------------------
;
; Info about the JTAG clock frequency:
; ------------------------------------
; BDI2000:
;   0=Adaptive,
;   1=16MHz, 2=8MHz, 3=4MHz,
;   4= 1MHz, 5=500kHz, 6=200kHz, 7=100kHz, 8=50kHz,
;   9=20kHz, 10=10kHz, 11=5kHz, 12=2kHz, 13=1kHz
; BDI3000:
;   0=Adaptive,
;   1=32MHz, 2=16MHz, 3=11MHz, 4=8MHz, 5=5MHz, 6=4MHz,
;   7=1MHz, 8=500kHz, 9=200kHz, 10=100kHz, 11=50kHz,
;   12=20kHz, 13=10kHz, 14=5kHz, 15=2kHz, 16=1kHz,
;
;

[INIT]
WGPR    13          0x10001ffc  ;set SP to top of internal SRAM
WM32    0x40048000  0x00000002  ;SYSMEMREMAP: User flash mode
;
; Select 12 MHz system oscillator (PLL off)
WM32    0x40048070  0x00000000  ;MAINCLKSEL: select IRC oscillator
WM32    0x40048074  0x00000000  ;MAINCLKUEN: update
WM32    0x40048074  0x00000001  ;MAINCLKUEN: update
;
WM32    0x40048238  0x0000edd0  ;PDRUNCFG: power-up system oscillator
DELAY   100
;
WM32    0x40048040  0x00000001  ;SYSPLLCLKSEL: select system oscillator
WM32    0x40048044  0x00000000  ;SYSPLLCLKUEN: update
WM32    0x40048044  0x00000001  ;SYSPLLCLKUEN: update
;
WM32    0x40048070  0x00000001  ;MAINCLKSEL: select system oscillator
WM32    0x40048074  0x00000000  ;MAINCLKUEN: update
WM32    0x40048074  0x00000001  ;MAINCLKUEN: update
;
WM32    0x40048078  0x00000001  ;SYSAHBCLKDIV: AHB clock divide by 1
;
; ============================================
; for test only, show main clock on CLKOUT pin
; ============================================
WM32    0x40048080  0x00011a5f  ;SYSAHBCLKCTRL: enable clock for IOCON
WM32    0x400480E0  0x00000003  ;CLKOUTCLKSEL: select main clock
WM32    0x400480E4  0x00000000  ;CLKOUTUEN: update
WM32    0x400480E4  0x00000001  ;CLKOUTUEN: update
WM32    0x400480E8  0x00000001  ;CLKOUTDIV: divide by 1
WM32    0x40044010  0x000000d1  ;IOCON_PIO0_1: select function CLKOUT
; ============================================
;


[TARGET]
CPUTYPE	    CORTEX-M0
CLOCK       4                   ;BDI3000: JTAG/SW clock 8MHz
;CLOCK       2                   ;BDI2000: JTAG/SW clock 8MHz
POWERUP     1000                ;start delay after power-up detected in ms
;RESET	    HARD 100            ;assert reset for 100 ms
RESET	    SOFT                ;assert reset via Reset Control Register
WAKEUP	    100                 ;wait after reset released
STARTUP     HALT                ;halt immediatelly at the reset vector
;STARTUP     RUN                 ;let boot ROM setup the system
ENDIAN      LITTLE              ;memory model (LITTLE | BIG)
BREAKMODE   SOFT                ;SOFT or HARD
MEMACCESS   AHB   1             ;memory access via AHB  (8 TCK's access delay)
;


[HOST]
IP          151.120.25.112
PROMPT	    LPC1114>
FILE        E:/temp/dump8k.bin
FORMAT      BIN 0x10000000
DEBUGPORT   2001 RECONNECT


[FLASH]
CHIPTYPE    LPC1000 12000       ;LPC1000 flash, fsys = 12.000 MHz
CHIPSIZE    0x8000              ;32kB flash
WORKSPACE   0x10000000          ;internal SRAM for buffer, code and stack
FILE        E:\temp\dump8k.bin
FORMAT      BIN 0x00006000
ERASE       0x000000C0 BLANK    ;erase sector 6...7 with blank check


[REGS]
FILE    $regLPC1114.def