; ==================================
; bdiGDB configuration for Cortex-M4
; ==================================
;
; Info about the JTAG clock frequency:
; ------------------------------------
; BDI2000:
;   0=Adaptive,
;   1=16MHz, 2=8MHz, 3=4MHz,
;   4= 1MHz, 5=500kHz, 6=200kHz, 7=100kHz, 8=50kHz,
;   9=20kHz, 10=10kHz, 11=5kHz, 12=2kHz, 13=1kHz
; BDI3000:
;   0=Adaptive,
;   1=32MHz, 2=16MHz, 3=11MHz, 4=8MHz, 5=5MHz, 6=4MHz,
;   7=1MHz, 8=500kHz, 9=200kHz, 10=100kHz, 11=50kHz,
;   12=20kHz, 13=10kHz, 14=5kHz, 15=2kHz, 16=1kHz,
;

[INIT]
WGPR    13      0x20007ffc      ;set SP to top of internal SRAM


[TARGET]
CPUTYPE	    CORTEX-M4
CLOCK       4                   ;BDI3000: JTAG clock 8MHz
;CLOCK       2                   ;BDI2000: JTAG clock 8MHz
POWERUP     3000                ;start delay after power-up detected in ms
RESET	    HARD 100            ;assert reset for 100 ms
;RESET	    SOFT                ;assert reset via Reset Control Register
WAKEUP	    100                 ;wait after reset released
STARTUP     HALT                ;halt immediatelly at the reset vector
;STARTUP     RUN                 ;let boot ROM setup the system
ENDIAN      LITTLE              ;memory model (LITTLE | BIG)
BREAKMODE   SOFT                ;SOFT or HARD
MEMACCESS   AHB   1             ;memory access via AHB  (8 TCK's access delay)
;


[HOST]
IP          151.120.25.112
PROMPT	    CTX-M4>
FILE        E:/temp/dump16k.bin
FORMAT      BIN 0x20000000


[FLASH]


[REGS]
FILE    $regCortex-M4.def