; ---------------------------------
; bdiGDB configuration for SAM3U-EK
; ---------------------------------
;
; Info about the JTAG clock frequency:
; ------------------------------------
; BDI2000:
;   0=Adaptive,
;   1=16MHz, 2=8MHz, 3=4MHz,
;   4= 1MHz, 5=500kHz, 6=200kHz, 7=100kHz, 8=50kHz,
;   9=20kHz, 10=10kHz, 11=5kHz, 12=2kHz, 13=1kHz
; BDI3000:
;   0=Adaptive,
;   1=32MHz, 2=16MHz, 3=11MHz, 4=8MHz, 5=5MHz, 6=4MHz,
;   7=1MHz, 8=500kHz, 9=200kHz, 10=100kHz, 11=50kHz,
;   12=20kHz, 13=10kHz, 14=5kHz, 15=2kHz, 16=1kHz,
;
;
; Manual Flash Command via Telnet:
; --------------------------------
; Set   GPNVM[BMS]  :  rm eefc0_fcr 0x5a00010b
; Clear GPNVM[BMS]  :  rm eefc0_fcr 0x5a00010c
; Get all GPNVM     :  rm eefc0_fcr 0x5a00000d;rd eefc0_frr
; Get all Lockbits  :  rm eefc0_fcr 0x5a00000a;rd eefc0_frr
; Get Flash Desc.   :  rm eefc0_fcr 0x5a000000;rd eefc0_frr;rd eefc0_frr;rd eefc0_frr;rd eefc0_frr
;
;

[INIT]
WGPR    13          0x20007ffc  ;set SP to top of internal SRAM0
WM32    0x400E1208  0xa5000401  ;User reset enable (allows BDI to hard reset the processor)
;
; Setup Internal Flash Wait States
WM32    0x400E0800  0x00000200  ;EEFC0_FMR: Flash mode (FWS=2)
WM32    0x400E0A00  0x00000200  ;EEFC1_FMR: Flash mode (FWS=2)
;
; setup clocks
WM32    0x400E0420  0x00373f09  ;CKGR_MOR: enable Main Oscillator
DELAY   100
WM32    0x400E0420  0x01373f09  ;CKGR_MOR: select Main Oscillator
DELAY   100
WM32    0x400E0428  0x20073f01  ;CKGR_PLLAR: Set PLLA to 96 MHz
DELAY   100
WM32    0x400E0430  0x00000011  ;PMC_MCKR: set PRES = 1 (clk/2)
DELAY   100
WM32    0x400E0430  0x00000012  ;PMC_MCKR: set CSS = 2 (select PLLA)
DELAY   100
;

[TARGET]
CPUTYPE	    CORTEX-M3
CLOCK       2 7                 ;BDI3000: start with 1MHz then use 16MHz
;CLOCK       1 4                 ;BDI2000: start with 1MHz then use 16MHz
POWERUP     3000                ;start delay after power-up detected in ms
TRST        OPENDRAIN           ;TRST driver type (OPENDRAIN | PUSHPULL)
RESET	    HARD 100            ;assert reset for 100 ms
;RESET	    SOFT                ;assert reset via Reset Control Register
;RESET       NONE
WAKEUP	    100                 ;wait after reset released
STARTUP     HALT                ;halt immediatelly at the reset vector
ENDIAN      LITTLE              ;memory model (LITTLE | BIG)
BREAKMODE   SOFT                ;SOFT or HARD
MEMACCESS   AHB   1             ;memory access via AHB  (8 TCK's access delay)


[HOST]
IP          151.120.25.112
PROMPT	    SAM3U>
FILE        E:/temp/dump16k.bin
FORMAT      BIN 0x20000000
DEBUGPORT   2001


[FLASH]
CHIPTYPE    SAM3U               ;Don't forget to set EEFC_FMR[FWS]
CHIPSIZE    0x20000             ;size of one block
BUSWIDTH    32
FILE        E:/temp/dump16k.bin
FORMAT      BIN 0x00094000
ERASE       0x00094000 0x100 64 ;erase 64 pages (16kB)


[REGS]
FILE    $regSAM3U.def