;Register definition for OMAP5 ;============================= ; ; name: user defined name of the register ; type: the type of the register ; GPR general purpose register ; CPx CPx register ; MM memory mapped register ; DMMx direct memory mapped register with offset ; x = 1..4 ; the base is defined in the configuration file ; e.g. DMM1 0x02200000 ; addr: the number, adddress or offset of the register ; size the size of the register (8,16 or 32) ; ; ; CPx 32-bit Register Numbers: ; ; +-----+-+-------+-----+-+-------+ ; |opc_2|0| CRm |opc_1|0| nbr | ; +-----+-+-------+-----+-+-------+ ; ; CPx 64-bit Register Numbers: ; ; +-------+-------+-------+-------+ ; | - | - | opc1 | CRm | ; +-------+-------+-------+-------+ ; ; The 16bit register number is used to build the appropriate MCR/MRC, MCRR/MRRC instruction. ; ; ;name type addr size ;------------------------------------------- ; ; 64-bit wide CP15 registers ; -------------------------- ttbr0_64 CP15 0x0002 64 ;Translation Table Base 0 ttbr1_64 CP15 0x0012 64 ;Translation Table Base 1 par_64 CP15 0x0007 64 ;Physical Address ; ; 32-bit wide CP15 registers ; -------------------------- ; CP15 c0 Registers midr CP15 0x0000 32 ;Main ID ctr CP15 0x2000 32 ;Cache type tcmtr CP15 0x4000 32 ;TCM type tlbtr CP15 0x6000 32 ;TLB type mpidr CP15 0xa000 32 ;Multiprocessor Affinity revidr CP15 0xc000 32 ;Revision ID ; id_pfr0 CP15 0x0100 32 ;Processor Feature 0 id_pfr1 CP15 0x2100 32 ;Processor Feature 1 id_dfr0 CP15 0x4100 32 ;Debug Feature 0 id_afr0 CP15 0x6100 32 ;Auxiliary Feature 0 id_mmfr0 CP15 0x8100 32 ;Memory Model Feature 0 id_mmfr1 CP15 0xa100 32 ;Memory Model Feature 1 id_mmfr2 CP15 0xc100 32 ;Memory Model Feature 2 id_mmfr3 CP15 0xe100 32 ;Memory Model Feature 3 ; id_isar0 CP15 0x0200 32 ;Instruction Set Attribute 0 id_isar1 CP15 0x2200 32 ;Instruction Set Attribute 1 id_isar2 CP15 0x4200 32 ;Instruction Set Attribute 2 id_isar3 CP15 0x6200 32 ;Instruction Set Attribute 3 id_isar4 CP15 0x8200 32 ;Instruction Set Attribute 4 id_isar5 CP15 0xa200 32 ;Instruction Set Attribute 5 ; ccsidr CP15 0x0010 32 ;Cache Size ID clidr CP15 0x2010 32 ;Cache Level ID aidr CP15 0xe010 32 ;Auxiliary ID csselr CP15 0x0040 32 ;Cache Size Selection ;vpidr CP15 0x0080 32 ;Virtualization Processor ID ;vmpidr CP15 0xa080 32 ;Virtualization Multiprocessor ID ; ; CP15 c1 Registers sctlr CP15 0x0001 32 ;System Control actlr CP15 0x2001 32 ;Auxiliary Control cpacr CP15 0x4001 32 ;Coprocessor Access Control ; ;scr CP15 0x0101 32 ;Secure Configuration ;sder CP15 0x2101 32 ;Secure Debug Enable nsacr CP15 0x4101 32 ;Nonsecure Access Control ; ;hsctlr CP15 0x0081 32 ;Hyp System Control ;hactlr CP15 0x2081 32 ;Hyp Auxiliary Control ; ;hcr CP15 0x0181 32 ;Hyp Configuration ;hdcr CP15 0x2181 32 ;Hyp Debug Configuration ;hcptr CP15 0x4181 32 ;Hyp Coprocessor Trap ;hstr CP15 0x6181 32 ;Hyp System Trap ;hacr CP15 0xe181 32 ;Hyp Auxiliary Configuration ; ; CP15 c2 Registers ttbr0 CP15 0x0002 32 ;Translation Table Base 0 ttbr1 CP15 0x2002 32 ;Translation Table Base 1 ttbcr CP15 0x4002 32 ;Translation Table Base Control ; ;htcr CP15 0x4082 32 ;Hyp Translation Control ;vtcr CP15 0x4182 32 ;Virtualization Translation Control ; ; CP15 c3 Registers dac CP15 0x0003 32 ;Domain Access Control ; ; CP15 c5 Registers dfsr CP15 0x0005 32 ;Data Fault Status ifsr CP15 0x2005 32 ;Inst Fault Status adfsr CP15 0x0105 32 ;Data Auxiliary Fault Status aifsr CP15 0x2105 32 ;Inst Auxiliary Fault Status ; ;hadfsr CP15 0x0185 32 ;Hyp Auxiliary Data Fault Syndrome ;haifsr CP15 0x2185 32 ;Hyp Auxiliary Instruction Fault Syndrome ;hadfsr CP15 0x0285 32 ;Hyp Syndrome ; ; CP15 c6 Registers dfar CP15 0x0006 32 ;Data Fault Address ifar CP15 0x4006 32 ;Inst Fault Address ; ;hdfar CP15 0x0086 32 ;Hyp Data Fault Address ;hifar CP15 0x4086 32 ;Hyp Instruction Fault Address ;hpfar CP15 0x8086 32 ;Hyp IPA Fault Address ; ; CP15 c12 Registers vbar CP15 0x000c 32 ;Vector Base Address ;mvbar CP15 0x200c 32 ;Monitor Vector Base Address isr CP15 0x010c 32 ;Interrupt Status ;hvbar CP15 0x008c 32 ;Hyp Vector Base Address ; ; CP15 c13 Registers fcseidr CP15 0x000d 32 ;FCSE Process ID contextidr CP15 0x200d 32 ;Context ID tpidrurw CP15 0x400d 32 ;User Read/Write Thread ID tpidruro CP15 0x600d 32 ;User Read-Only Thread ID tpidrprw CP15 0x800d 32 ;PL1 only Thread ID ;htpidr CP15 0x408d 32 ;Hyp Software Thread ID ; ; DAP APB Registers ; cpu0_didr APB 0xD4140000 cpu1_didr APB 0xD4142000 ; cti0_control APB 0xD4148000 cti0_intack APB 0xD4148010 cti0_appset APB 0xD4148014 cti0_appclear APB 0xD4148018 cti0_apppulse APB 0xD414801C cti0_inen0 APB 0xD4148020 cti0_inen1 APB 0xD4148024 cti0_inen2 APB 0xD4148028 cti0_inen3 APB 0xD414802C cti0_inen4 APB 0xD4148030 cti0_inen5 APB 0xD4148034 cti0_inen6 APB 0xD4148038 cti0_inen7 APB 0xD414803C cti0_outen0 APB 0xD41480A0 cti0_outen1 APB 0xD41480A4 cti0_outen2 APB 0xD41480A8 cti0_outen3 APB 0xD41480AC cti0_outen4 APB 0xD41480B0 cti0_outen5 APB 0xD41480B4 cti0_outen6 APB 0xD41480B8 cti0_outen7 APB 0xD41480BC cti0_triginsta APB 0xD4148130 cti0_trigoutsta APB 0xD4148134 cti0_chinsta APB 0xD4148138 cti0_choutsta APB 0xD414813C cti0_gate APB 0xD4148140 ; cti1_control APB 0xD4149000 cti1_intack APB 0xD4149010 cti1_appset APB 0xD4149014 cti1_appclear APB 0xD4149018 cti1_apppulse APB 0xD414901C cti1_inen0 APB 0xD4149020 cti1_inen1 APB 0xD4149024 cti1_inen2 APB 0xD4149028 cti1_inen3 APB 0xD414902C cti1_inen4 APB 0xD4149030 cti1_inen5 APB 0xD4149034 cti1_inen6 APB 0xD4149038 cti1_inen7 APB 0xD414903C cti1_outen0 APB 0xD41490A0 cti1_outen1 APB 0xD41490A4 cti1_outen2 APB 0xD41490A8 cti1_outen3 APB 0xD41490AC cti1_outen4 APB 0xD41490B0 cti1_outen5 APB 0xD41490B4 cti1_outen6 APB 0xD41490B8 cti1_outen7 APB 0xD41490BC cti1_triginsta APB 0xD4149130 cti1_trigoutsta APB 0xD4149134 cti1_chinsta APB 0xD4149138 cti1_choutsta APB 0xD414913C cti1_gate APB 0xD4149140 ;