;Register definition for Cortex-A9 ;================================= ; ; name: user defined name of the register ; type: the type of the register ; GPR general purpose register ; CPx CPx register ; MM memory mapped register ; DMMx direct memory mapped register with offset ; x = 1..4 ; the base is defined in the configuration file ; e.g. DMM1 0x02200000 ; addr: the number, adddress or offset of the register ; size the size of the register (8,16 or 32) ; ; ; CPx Registers Numbers for Cortex-A9 cores: ; ; +-----+-+-------+-----+-+-------+ ; |opc_2|0| CRm |opc_1|0| nbr | ; +-----+-+-------+-----+-+-------+ ; ; The 16bit register number is used to build the appropriate MCR/MRC instruction. ; ; MRC , , , , {, } ; DBGDSCRint: 0, c0, c1, 0 ==>> 0x0100 ; DBGDSCRext: 0, c0, c2, 2 ==>> 0x4200 ; ; ;name type addr size ;------------------------------------------- ; ; ; CP15 Registers ; mainid CP15 0x0000 32 ;ID code cachetype CP15 0x2000 32 ;Cache type tcmstatus CP15 0x4000 32 ;TCM status tlbtype CP15 0x6000 32 ;TCM type mputype CP15 0x8000 32 ;MPU type multipid CP15 0xa000 32 ;Multiprocessor ID ; procfeature0 CP15 0x0100 32 ;Processor Feature 0 procfeature1 CP15 0x2100 32 ;Processor Feature 1 dbgfeature0 CP15 0x4100 32 ;Debug Feature 0 auxfeature0 CP15 0x6100 32 ;Auxiliary Feature 0 memfeature0 CP15 0x8100 32 ;Memory Model Feature 0 memfeature1 CP15 0xa100 32 ;Memory Model Feature 1 memfeature2 CP15 0xc100 32 ;Memory Model Feature 2 memfeature3 CP15 0xe100 32 ;Memory Model Feature 3 ; instrattr0 CP15 0x0200 32 ;Instruction Set Attribute 0 instrattr1 CP15 0x2200 32 ;Instruction Set Attribute 1 instrattr2 CP15 0x4200 32 ;Instruction Set Attribute 2 instrattr3 CP15 0x6200 32 ;Instruction Set Attribute 3 instrattr4 CP15 0x8200 32 ;Instruction Set Attribute 4 instrattr5 CP15 0xa200 32 ;Instruction Set Attribute 5 instrattr6 CP15 0xc200 32 ;Instruction Set Attribute 6 instrattr7 CP15 0xe200 32 ;Instruction Set Attribute 7 ; control CP15 0x0001 32 ;Control auxcontrol CP15 0x2001 32 ;Auxiliary Control cpaccess CP15 0x4001 32 ;Coprocessor Access ; securecfg CP15 0x0101 32 ;Secure Configuration securedbg CP15 0x2101 32 ;Secure Debug Enable nonsecure CP15 0x4101 32 ;Nonsecure Access Control ; ttb0 CP15 0x0002 32 ;Translation Table Base 0 ttb1 CP15 0x2002 32 ;Translation Table Base 1 ttbc CP15 0x4002 32 ;Translation Table Base Control ; dac CP15 0x0003 32 ;Domain Access Control ; dfsr CP15 0x0005 32 ;Data Fault Status ifsr CP15 0x2005 32 ;Inst Fault Status dauxfsr CP15 0x0105 32 ;Data Auxiliary Fault Status iaucfsr CP15 0x2105 32 ;Inst Auxiliary Fault Status ; dfar CP15 0x0006 32 ;Data Fault Address ifar CP15 0x4006 32 ;Inst Fault Address ; fcsepid CP15 0x000d 32 ;Process ID context CP15 0x200d 32 ;Context ID ; ; ; DAP APB Registers ; cpu0_didr APB 0x82150000 cpu1_didr APB 0x82152000 cpu2_didr APB 0x82154000 cpu3_didr APB 0x82156000 ; cti0_control APB 0x82158000 cti0_intack APB 0x82158010 cti0_appset APB 0x82158014 cti0_appclear APB 0x82158018 cti0_apppulse APB 0x8215801C cti0_inen0 APB 0x82158020 cti0_inen1 APB 0x82158024 cti0_inen2 APB 0x82158028 cti0_inen3 APB 0x8215802C cti0_inen4 APB 0x82158030 cti0_inen5 APB 0x82158034 cti0_inen6 APB 0x82158038 cti0_inen7 APB 0x8215803C cti0_outen0 APB 0x821580A0 cti0_outen1 APB 0x821580A4 cti0_outen2 APB 0x821580A8 cti0_outen3 APB 0x821580AC cti0_outen4 APB 0x821580B0 cti0_outen5 APB 0x821580B4 cti0_outen6 APB 0x821580B8 cti0_outen7 APB 0x821580BC cti0_triginsta APB 0x82158130 cti0_trigoutsta APB 0x82158134 cti0_chinsta APB 0x82158138 cti0_choutsta APB 0x8215813C cti0_gate APB 0x82158140 ; cti1_control APB 0x82159000 cti1_intack APB 0x82159010 cti1_appset APB 0x82159014 cti1_appclear APB 0x82159018 cti1_apppulse APB 0x8215901C cti1_inen0 APB 0x82159020 cti1_inen1 APB 0x82159024 cti1_inen2 APB 0x82159028 cti1_inen3 APB 0x8215902C cti1_inen4 APB 0x82159030 cti1_inen5 APB 0x82159034 cti1_inen6 APB 0x82159038 cti1_inen7 APB 0x8215903C cti1_outen0 APB 0x821590A0 cti1_outen1 APB 0x821590A4 cti1_outen2 APB 0x821590A8 cti1_outen3 APB 0x821590AC cti1_outen4 APB 0x821590B0 cti1_outen5 APB 0x821590B4 cti1_outen6 APB 0x821590B8 cti1_outen7 APB 0x821590BC cti1_triginsta APB 0x82159130 cti1_trigoutsta APB 0x82159134 cti1_chinsta APB 0x82159138 cti1_choutsta APB 0x8215913C cti1_gate APB 0x82159140 ; cti2_control APB 0x8215A000 cti2_intack APB 0x8215A010 cti2_appset APB 0x8215A014 cti2_appclear APB 0x8215A018 cti2_apppulse APB 0x8215A01C cti2_inen0 APB 0x8215A020 cti2_inen1 APB 0x8215A024 cti2_inen2 APB 0x8215A028 cti2_inen3 APB 0x8215A02C cti2_inen4 APB 0x8215A030 cti2_inen5 APB 0x8215A034 cti2_inen6 APB 0x8215A038 cti2_inen7 APB 0x8215A03C cti2_outen0 APB 0x8215A0A0 cti2_outen1 APB 0x8215A0A4 cti2_outen2 APB 0x8215A0A8 cti2_outen3 APB 0x8215A0AC cti2_outen4 APB 0x8215A0B0 cti2_outen5 APB 0x8215A0B4 cti2_outen6 APB 0x8215A0B8 cti2_outen7 APB 0x8215A0BC cti2_triginsta APB 0x8215A130 cti2_trigoutsta APB 0x8215A134 cti2_chinsta APB 0x8215A138 cti2_choutsta APB 0x8215A13C cti2_gate APB 0x8215A140 ; cti3_control APB 0x8215B000 cti3_intack APB 0x8215B010 cti3_appset APB 0x8215B014 cti3_appclear APB 0x8215B018 cti3_apppulse APB 0x8215B01C cti3_inen0 APB 0x8215B020 cti3_inen1 APB 0x8215B024 cti3_inen2 APB 0x8215B028 cti3_inen3 APB 0x8215B02C cti3_inen4 APB 0x8215B030 cti3_inen5 APB 0x8215B034 cti3_inen6 APB 0x8215B038 cti3_inen7 APB 0x8215B03C cti3_outen0 APB 0x8215B0A0 cti3_outen1 APB 0x8215B0A4 cti3_outen2 APB 0x8215B0A8 cti3_outen3 APB 0x8215B0AC cti3_outen4 APB 0x8215B0B0 cti3_outen5 APB 0x8215B0B4 cti3_outen6 APB 0x8215B0B8 cti3_outen7 APB 0x8215B0BC cti3_triginsta APB 0x8215B130 cti3_trigoutsta APB 0x8215B134 cti3_chinsta APB 0x8215B138 cti3_choutsta APB 0x8215B13C cti3_gate APB 0x8215B140 ;