; ------------------------------------------
; Minimal bdiGDB configuration for Cortex-A8
; ------------------------------------------
;
; Info about the JTAG clock frequency:
; ------------------------------------
; BDI2000:
;   0=Adaptive, 1=16MHz, 2=8MHz, 3=4MHz
;   4=1MHz, 5=500kHz, 6=200kHz, 7=100kHz
;   8=50kHz, 9=20kHz, 10=10kHz
; BDI3000:
;   0=Adaptive, 1=32MHz, 2=16MHz, 3=11MHz,
;   4=8MHz, 5=5MHz, 6=4MHz, 7=1MHz, 8=500kHz
;   9=200kHz, 10=100kHz, 11=50kHz, 12=20kHz,
;   13=10kHz, 14=5kHz, 15=2kHz, 16=1kHz,
;

[INIT]


[TARGET]
POWERUP         2000            ;start delay after power-up detected in ms
;CLOCK           2               ;BDI2000: JTAG clock 8MHz
CLOCK           4               ;BDI3000: JTAG clock 8MHz
TRST            OPENDRAIN       ;TRST driver type (OPENDRAIN | PUSHPULL)
RESET	        HARD 200        ;assert reset for 200 ms
WAKEUP	        200             ;wait after reset released
;
CPUTYPE         CORTEX-A8       ;Core is Cortex-A8
STARTUP         HALT            ;halt immediatelly after reset
ENDIAN          LITTLE          ;memory model (LITTLE | BIG)
BREAKMODE       HARD            ;SOFT or HARD
MEMACCESS       CORE   10       ;memory access via Core  (80 TCK's access delay)
;MEMACCESS       AHB    8        ;memory access via AHB  (64 TCK's access delay)
;

[HOST]
IP              151.120.25.119
PROMPT          CTX-A8>


[FLASH]


[REGS]
FILE            $regCortex-A8.def