;Register definition for ARMv8 ;============================= ; ; name: user defined name of the register ; type: the type of the register ; GPR general purpose register ; SYS System register ; MM memory mapped register ; DMMx direct memory mapped register with offset ; x = 1..4 ; the base is defined in the configuration file ; e.g. DMM1 0x02200000 ; addr: the number, adddress or offset of the register ; size the size of the register (8,16 or 32) ; ; ; AV8 Register Numbers : ; +-------+-------+-------+-------+ ; | | | | | | | | | | | | | | | | | ; +-+-----+-------+-------+-----+-+ ; |o| op1 | CRn | CRm | op2 |-| ; +-+-----+-------+-------+-----+-+ ; ; AV7 Register Numbers (low word): ; +-------+-------+-------+-------+ ; | | | | | | | | | | | | | | | | | ; +-----+-+-------+-----+-+-------+ ; |opc_2|0| CRm |opc_1|0| nbr | ; +-----+-+-------+-----+-+-------+ ; High word defines the CP number ; ; ;name type addr size ;------------------------------------------- ; ; ; System Registers ; ; midr_el1 SYS 0x8000 ctr_el0 SYS 0xb002 mpidr_el1 SYS 0x800a 64 revidr_el1 SYS 0x800c dczid_el0 SYS 0xb00e id_pfr0_el1 SYS 0x8010 id_pfr1_el1 SYS 0x8012 id_dfr0_el1 SYS 0x8014 id_afr0_el1 SYS 0x8016 id_mmfr0_el1 SYS 0x8018 id_mmfr1_el1 SYS 0x801a id_mmfr2_el1 SYS 0x801c id_mmfr3_el1 SYS 0x801e id_isar0_el1 SYS 0x8020 id_isar1_el1 SYS 0x8022 id_isar2_el1 SYS 0x8024 id_isar3_el1 SYS 0x8026 id_isar4_el1 SYS 0x8028 id_isar5_el1 SYS 0x802a mvfr0_el1 SYS 0x8030 mvfr1_el1 SYS 0x8032 mvfr2_el1 SYS 0x8034 aa64pfr0_el1 SYS 0x8040 aa64pfr1_el1 SYS 0x8042 aa64dfr0_el1 SYS 0x8050 aa64dfr1_el1 SYS 0x8052 aa64afr0_el1 SYS 0x8058 aa64afr1_el1 SYS 0x805a aa64isar0_el1 SYS 0x8060 aa64isar1_el1 SYS 0x8062 aa64mmfr0_el1 SYS 0x8070 aa64mmfr1_el1 SYS 0x8072 ccsidr_el1 SYS 0x9000 clidr_el1 SYS 0x9002 aidr_el1 SYS 0x900e csselr_el1 SYS 0xa000 sctlr_el1 SYS 0x8100 actlr_el1 SYS 0x8102 cpacr_el1 SYS 0x8104 ttbr0_el1 SYS 0x8200 64 ttbr1_el1 SYS 0x8202 64 tcr_el1 SYS 0x8204 64 afsr0_el1 SYS 0x8510 afsr1_el1 SYS 0x8512 esr_el1 SYS 0x8520 far_el1 SYS 0x8600 64 par_el1 SYS 0x8740 64 mair_el1 SYS 0x8a20 64 amair_el1 SYS 0x8a30 64 vbar_el1 SYS 0x8c00 64 isr_el1 SYS 0x8c10 contextidr_el1 SYS 0x8d02 tpidr_el0 SYS 0xbd04 64 tpidrro_el0 SYS 0xbd06 64 tpidr_el1 SYS 0x8d08 64 cntfrq_el0 SYS 0xbe00 cntpct_el0 SYS 0xbe02 64 cntvct_el0 SYS 0xbe04 64 cntkctl_el1 SYS 0x8e10 cntp_tval_el0 SYS 0xbe20 cntp_ctl_el0 SYS 0xbe22 cntp_cval_el0 SYS 0xbe24 64 cntv_tval_el0 SYS 0xbe30 cntv_ctl_el0 SYS 0xbe32 cntv_cval_el0 SYS 0xbe34 64 ; sp_el0 SYS 0x8410 64 ; dlr_el0 SYS 0xb452 64 dspsr_el0 SYS 0xb450 32 ; ; External Debug Registers ; dbg_edesr DBG 0x00020 32 dbg_edecr DBG 0x00024 32 dbg_edwar DBG 0x00030 64 dbg_edscr DBG 0x00088 32 ; dbg_oslar DBG 0x00300 32 dbg_edprcr DBG 0x00310 32 dbg_edprsr DBG 0x00314 32 ; dbg_bvr0 DBG 0x00400 64 dbg_bcr0 DBG 0x00408 32 ; dbg_bvr1 DBG 0x00410 64 dbg_bcr1 DBG 0x00418 32 ; ; ; Cross-trigger Interface Registers ; cti_control DBG 0x10000 32 cti_intack DBG 0x10010 32 cti_appset DBG 0x10014 32 cti_appclear DBG 0x10018 32 cti_apppulse DBG 0x1001C 32 cti_inen0 DBG 0x10020 32 cti_inen1 DBG 0x10024 32 cti_outen0 DBG 0x100A0 32 cti_outen1 DBG 0x100A4 32 cti_triginsta DBG 0x10130 32 cti_trigoutsta DBG 0x10134 32 cti_chinsta DBG 0x10138 32 cti_choutsta DBG 0x1013C 32 cti_gate DBG 0x10140 32 cti_asicctl DBG 0x10144 32