; bdiGDB configuration file for AT91RM9200-DK
; -------------------------------------------
;
[INIT]
WREG    CPSR        0x000000D3  ;select supervisor mode
WM32    0xFFFFFF00  0x00000001  ;Cancel reset remapping
WM32    0xFFFFFC20  0x0000FF01  ;PMC_MOR : Enable main oscillator , OSCOUNT = 0xFF
;
;       Init Flash
WM32    0xFFFFFF10  0x00000000  ;MC_PUIA[0]
WM32    0xFFFFFF50  0x00000000  ;MC_PUP
WM32    0xFFFFFF54  0x00000000  ;MC_PUER: Memory controller protection unit disable
;WM32    0xFFFFFF04  0x00000000  ;MC_ASR
;WM32    0xFFFFFF08  0x00000000  ;MC_AASR
WM32    0xFFFFFF64  0x00000000  ;EBI_CFGR
WM32    0xFFFFFF70  0x00003284  ;SMC2_CSR[0]: 16bit, 2 TDF, 4 WS
;
;       Init Clocks
WM32    0xFFFFFC28  0x20263E04  ;PLLAR: 179,712000 MHz for PCK
DELAY   100
WM32    0xFFFFFC2C  0x10483E0E  ;PLLBR: 48,054857 MHz (divider by 2 for USB)
DELAY   100
WM32    0xFFFFFC30  0x00000202  ;MCKR : PCK/3 = MCK Master Clock = 59,904000MHz from PLLA
DELAY   100
;
;       Init SDRAM
WM32    0xFFFFF870  0xFFFF0000  ;PIOC_ASR: Configure PIOC as peripheral (D16/D31)
WM32    0xFFFFF874  0x00000000  ;PIOC_BSR:
WM32    0xFFFFF804  0xFFFF0000  ;PIOC_PDR:
WM32    0xFFFFFF60  0x00000002  ;EBI_CSA : CS1=SDRAM
WM32    0xFFFFFF64  0x00000000  ;EBI_CFGR:
WM32    0xFFFFFF98  0x2188c155  ;SDRC_CR :
WM32    0xFFFFFF90  0x00000002  ;SDRC_MR : Precharge All
WM32    0x20000000  0x00000000  ;access SDRAM
WM32    0xFFFFFF90  0x00000004  ;SDRC_MR : Refresh
WM32    0x20000000  0x00000000  ;access SDRAM
WM32    0x20000000  0x00000000  ;access SDRAM
WM32    0x20000000  0x00000000  ;access SDRAM
WM32    0x20000000  0x00000000  ;access SDRAM
WM32    0x20000000  0x00000000  ;access SDRAM
WM32    0x20000000  0x00000000  ;access SDRAM
WM32    0x20000000  0x00000000  ;access SDRAM
WM32    0x20000000  0x00000000  ;access SDRAM
WM32    0xFFFFFF90  0x00000003  ;SDRC_MR : Load Mode Register
WM32    0x20000080  0x00000000  ;access SDRAM
WM32    0xFFFFFF94  0x000002E0  ;SDRC_TR : Write refresh rate
WM32    0x20000000  0x00000000  ;access SDRAM
WM32    0xFFFFFF90  0x00000000  ;SDRC_MR : Normal Mode
WM32    0x20000000  0x00000000  ;access SDRAM
;

[TARGET]
CPUTYPE     ARM920T
;CLOCK       2                   ;BDI2000: JTAG clock 8MHz
CLOCK       4                   ;BDI3000: JTAG clock 8MHz
;WAKEUP      500                 ;wakeup time after reset
;STARTUP     STOP 2000           ;let the monitor setup the memory controller.
VECTOR      CATCH 0x1f          ;catch D_Abort, P_Abort, SWI, Undef and Reset
BREAKMODE   SOFT 0xDFFFDFFF     ;SOFT or HARD, ARM / Thumb break code
;BREAKMODE   HARD                ;SOFT or HARD, ARM / Thumb break code
STEPMODE    HWBP
;DCC         7                   ;DCC I/O via TCP port 7
WORKSPACE   0x00200000          ;workspace in internal fast SRAM

[HOST]
IP          151.120.25.119
FILE        E:\temp\dump512k.bin
FORMAT      BIN 0x20000000
;FILE        E:\cygwin\home\demo\pid7t\fibo.x
;FORMAT      ELF
LOAD        MANUAL      ;<AGENT> load VxWorks code MANUAL or AUTO after reset
PROMPT      9200>      ;new Telnet prompt

[FLASH]
WORKSPACE   0x0000100   ;workspace in target RAM for fast programming algorithm
CHIPTYPE    AM29BX16
;CHIPTYPE    AT49X16     ;Flash type is Atmel AT49BV1614A in 16bit mode
CHIPSIZE    0x200000    ;The size of one flash chip in bytes (e.g. AM29F010 = 0x20000)
BUSWIDTH    16          ;The width of the flash memory bus in bits (8 | 16 | 32)
FILE        E:\cygwin\home\bdidemo\at91\vxWorks  ;The file to program
FORMAT      BIN 0x10100000
ERASE       0x10100000
ERASE       0x10110000
ERASE       0x10120000
ERASE       0x10130000
ERASE       0x10140000
ERASE       0x10150000
ERASE       0x10160000
ERASE       0x10170000

[REGS]
FILE	E:\cygwin\home\bdidemo\at91\reg9200.def