; -------------------------------------------------
; bdiGDB configuration for Cavium Econa CNS3xxx EVB
; -------------------------------------------------
;
; Info about the JTAG clock frequency:
; ------------------------------------
; BDI2000:
;   0=Adaptive, 1=16MHz, 2=8MHz, 3=4MHz
;   4=1MHz, 5=500kHz, 6=200kHz, 7=100kHz
;   8=50kHz, 9=20kHz, 10=10kHz
; BDI3000:
;   0=Adaptive, 1=32MHz, 2=16MHz, 3=11MHz,
;   4=8MHz, 5=5MHz, 6=4MHz, 7=1MHz, 8=500kHz
;   9=200kHz, 10=100kHz, 11=50kHz, 12=20kHz,
;   13=10kHz, 14=5kHz, 15=2kHz, 16=1kHz,
;
;
[INIT]
;WCP15   0x4001      0x00f00000  ;CPACC: allow CP10 and CP11 access
;WCP10   0x00E8      0x40000000  ;FPEXC: enable VFP11
;

[TARGET]
; common parameters
POWERUP     3000                ;start delay after power-up detected in ms
;CLOCK       3                   ;BDI2000: JTAG clock 4 MHz
CLOCK       6                   ;BDI3000: JTAG clock 4 MHz
WAKEUP      200                 ;give reset time to complete

;======================================================
; !!!! defines the cores numbers without any holes !!!!
;======================================================
;
; Core#0 parameters (active core after reset)
#0 CPUTYPE     MPCORE           ;CPU type
#0 ENDIAN      LITTLE           ;little endian
#0 VECTOR      CATCH 0x1f       ;catch D_Abort, P_Abort, SWI, Undef and Reset
;#0 STARTUP     HALT             ;halt core at reset vector (if possible)
#0 STARTUP     STOP 2000        ;let boot code setup the system
#0 BREAKMODE   HARD             ;SOFT or HARD
#0 SCANPRED    0   0            ;select first core
#0 SCANSUCC    1   5
;
; Core#1 parameters
#1 CPUTYPE     MPCORE           ;CPU type
#1 ENDIAN      LITTLE           ;little endian
#1 VECTOR      CATCH 0x1f       ;catch D_Abort, P_Abort, SWI, Undef and Reset
#1 STARTUP     HALT             ;halt core at reset vector (if possible)
#1 BREAKMODE   HARD             ;SOFT or HARD
#1 SCANPRED    1   5            ;select second core
#1 SCANSUCC    0   0
;


[HOST]
FILE        E:\cygwin\home\demo\arm11\fibo.x
FORMAT      ELF

#0 PROMPT      MP11#0>
#1 PROMPT      MP11#1>


[FLASH]


[REGS]
FILE	$regMP11.def